SAT definition of ARRE bit in mode page
James C Hatfield
james.c.hatfield at seagate.com
Mon Feb 8 11:05:20 PST 2010
Formatted message: <a href="http://www.t10.org/cgi-bin/ac.pl?t=r&f=r1002082_f.htm">HTML-formatted message</a>
(As I understand ATA HDDs): If a sector is successfully recovered, then
there is no need to actually reallocate it. Reallocations only occur for
Also, given that DATA SET MANAGEMENT(Trim) may apply to HDDs, if a sector is
Trimmed, then the device does not have to wait for a new Write from the host
in order to perform the reallocation, as the actual data in the reallocated
location is irrelevant (subject to DRAT rules, of course).
Thank You !!!
Seagate Technology LLC
e-mail: James.C.Hatfield at seagate.com
s-mail: 389 Disc Drive; Longmont, CO 80503 USA
On Mon, Feb 8, 2010 at 10:45 AM, <Bill.Martin at emulex.com> wrote:
> In SAT, it was determined during letter ballot resolution to make ARRE
> set to zero and AWRE set to one in the Read-write error recovery mode page.
> The reasoning was as follows (from 06-121r5):
> Discussed: What is the reasoning behind the specified values for ARRE and
> AWRE? LB comments from HPQ and LSI as well as 05-241r2 suggest AWRE should
> be "one", and ARRE should be "zero". My understanding is that an ATA device
> will auto-reallocate on an unrecoverable READ error, but that the
> reallocation is deferred until the next time that same logical sector is
> written. An ATA device does not check data consistency on a write, and
> is no write-and-verify equivalent, so I don't see that an ATA device will
> auto-reallocate due to an error on a write command. But..., the data that
> ends up in the alternate sector is the data from the write, not the data
> from the read, so AWRE is one and ARRE is zero.
> This discussion is based around an unrecoverable read error; however from
> SBC-3r21, ARRE is based on a recovered read error. The following is from
> 6.4.5 Read-Write Error Recovery mode page:
> An ARRE bit set to one specifies that the device server shall enable
> automatic reassignment of defective logical blocks during read operations.
> All error recovery actions required by the error recovery bits (i.e., the
> EER bit, the PER bit, the DTE bit, and the DCR bit) shall be processed. The
> automatic reassignment shall then be performed only if the device server
> successfully recovers the data. The recovered data shall be placed in the
> reassigned logical block. The device server shall report any failures that
> occur during the reassignment operation. Error reporting as specified by
> error recovery bits (i.e., the EER bit, the PER bit, the DTE bit, and the
> DCR bit) shall be performed only after completion of the reassignment
> operation. See the REASSIGN BLOCKS command (see 5.19) for error procedures.
> This clearly states that the reassignment is ONLY performed if the device
> server successfully recovers the data.
> I am looking for clarification on how ATA devices operate. If an ATA
> device recovers read data will it reassign the block during the read
> operation to a different location on the media? If it will make this
> reassignment, then I will bring in a proposal for SAT-3 to change the bit
> settings in this mode page.
> Bill Martin
> Office of Technology
> Industry Standards
> 916 772-3658
> 916 765-6875 (Cell)
> bill.martin at emulex.com
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