question regarding D.C. idle detection

Karthikeyan, Kishore K kishore.k.karthikeyan at intel.com
Fri Aug 7 12:16:09 PDT 2009


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Thanks Rob
My question is for a configuration where both phy-A and phy-B are SAS-2
compliant devices.
So if I understand correctly,
phy-A (which supports only SNW2 and SNW3) shall restart after SNW2)
phy-B (which only supports SNW1) shall go through SNW3 before restarting OOB.
Is this the correct interpretation?
You answered what the behavior should be for phy-A but not for a SAS-2
compliant phy-B which only supports SNW1.
Can you please clarify whether phy-B will restart after SNW2 or after SNW3?
If we follow the flow diagram(fig 157), then it looks like it has to go
through SNW3 before restarting OOB.
Thanks
Kishore
________________________________
From: Elliott, Robert (Server Storage) [mailto:Elliott at hp.com]
Sent: Friday, August 07, 2009 11:56 AM
To: Karthikeyan, Kishore K; t10 at t10.org
Subject: RE: question regarding D.C. idle detection
That a) b) list is preceded by "If the phy detects" which means the receiver:
"A phy should detect whether the physical link is D.C. idle during SNW-1 and
SNW-2, even if the phy does not support that SNW. If the phy detects:
a) SNW-1 is not D.C. idle; and
b) SNW-2 is D.C. idle,
then it should end the speed negotiation sequence without progressing to
SNW-3."
A SAS-1.1 compliant phy B and a SAS-2 compliant phy B behave the same; they
run SNW-1, SNW-2, then restart.
A SAS-2 compliant phy A runs SNW-1 and sees that it is not D.C. idle.  It
then runs SNW-2 and sees that it is D.C. idle.	Therefore, the "should" rule
applies, and it is advised to give up immediately without progressing to
SNW-3 (staying in better sync with phy B, avoiding sending it some SNW-3
COMWAKEs that could be misinterpreted as SATA port selector indications).
---
Rob Elliott, HP Industry Standard Server Storage
From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Karthikeyan,
Kishore K
Sent: Friday, August 07, 2009 12:50 PM
To: t10 at t10.org
Subject: question regarding D.C. idle detection
All
The standard (sas2r16) shows a diagram (fig 161) of the case where PHY-A
supports only SNW3 and PHY-B supports only SNW1.
In this case with the new change in the standard (dc_idle detection), both
PHYs will start its hotplug timer at the end of SNW2.
Now, I would like to know the behavior for the case where PHY-A supports both
SNW2 and SNW3 but PHY-B supports only SNW1.
According to the flow diagram (fig 157)
If we interpret detection of D.C. idle as detection only on the RX side, then
PHY-A will restart OOB after SNW2 but PHY-B will restart OOB only after SNW3.
So PHY-B will have to go through SNW3 (where it will transmit D.C. idle) and
then restart OOB.
But on the other hand if we interpret detection of D.C. idle as detection of
D.C. idle on both TX and RX links, then both PHY-A and PHY-B will restart OOB
after SNW2.
Which is the correct interpretation and what should be the correct behavior
of PHY-A and PHY-B (both of which are compliant to sas2 standard) in this
configuration?
The problem is that statements like
a) SNW-1 is not D.C. idle; and
b) SNW-2 is D.C. idle
in the standard can be interpreted like DC idle detection on both TX and RX
phys of a device in which case the behavior will be a bit different.
It would be good to add a diagram for this configuration also to the standard
to make matters clear.
I know I am beating this horse to death here but any help in interpretation
of the standard in this matter is appreciated :)
Thanks
Kishore
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