SSC profile question
cphill at altaeng.com
Wed Nov 28 09:47:25 PST 2007
* From the T10 Reflector (t10 at t10.org), posted by:
* Chuck Hill <cphill at altaeng.com>
The whole issue is this: the underlying clock source has phase
modulation on it; this phase modulation has frequency components all the
way from 100's of MHz down to 1Hz. The phase modulation comes from a
number of different sources. Some rationale needs to be employed to
separate out limits for the phase modulation at different frequencies.
The high frequencies are jitter and that is covered already. Below
f/1667, the phase modulation is partially tracked so something else is
needed. Below the SSC modulation frequency of 30kHz, then something yet
different is needed. It is clear by looking at measured SSC profiles
there are phase modulation frequency components below 30kHz.
The long term frequency accuracy of a clock source is a number, not a
function or a spectrum. Long term frequency is measured with a frequency
counter and it is assumed the accuracy improves as the gating period is
increased, providing more and more filtering out of the low frequency
phase noise of the source.
Jenkins, Mike wrote:
> Phy folks,
> I have a question regarding the SSC profile to which I cannot find an
> answer in the draft spec. (As usual, my apologies if Ive overlooked
> something.) The question is how the profile is measured in practice.
> Measuring clock waveform periods will result in significant noise
> superimposed on the longer term frequency. For example, 0.01UI
> instantaneous jitter in one clock cycle is a 10 000 ppm frequency
> error. Obviously such data must be filtered, but what is the filter?
> An obvious candidate is the low pass filter defined by 1-JTF, but this
> should probably be defined.
> For what its worth, I do not believe there is even a defined
> measurement procedure to verify the +/-100 ppm long-term frequency
> Thanks for any pointers or opinions on this question.
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