SAS PHY transients during mode transitions questions

Day, Brian Brian.Day at lsil.com
Mon Jan 31 09:57:57 PST 2005


* From the T10 Reflector (t10 at t10.org), posted by:
* "Day, Brian" <Brian.Day at lsil.com>
*
I've been trying to understand more of the issues being discussed on the
transients during mode transistions.  I have a couple basic questions
regarding the various numbers in the SAS 1.1 rev 7 draft spec, particularly
related to the common mode voltage.

Table 28 lists +/- 1.2V for transmitter transients during a mode
transistion.  As long as Vp and Vn are within the 1.2V range on the test
circuit, is there a range that the common mode voltage must remain within as
well?

Also in Table 28, shows the Receiver AC common mode specs for voltage and
frequency.  Do these apply during mode transitions in OOB, or only during
"normal" data transfer?  I would think not during mode transitions.

Table 29 lists transmitter OOB common mode delta of +/- 50 mV.  The notes f
and g make me believe that this is not required to be met during a mode
transition, but only during the valid OOB burst signalling.  True?

Table 30, for the maximum noise during OOB idle time of +/- 120 mV.  I think
this also would mean the allowable noise during the "real" idle time (and
negation time) of an OOB signal.  A mode transition farther away in time of
an OOB signal may go beyond 120 mV, and doesn't really matter?

Thanks in advance for helping a digital guy understand these analog specs
more.

Brian Day
LSI Logic










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