Rate matching and ALIGNs

[Elliott, Robert (Server Storage)]

* From the T10 Reflector (t10 at t10.org), posted by:
* "Elliott, Robert (Server Storage)" <elliott at hp.com>
*
> * From the T10 Reflector (t10 at t10.org), posted by:
> * Fred Dutton <fred.dutton at qlogic.com>
> *
> Hello,
> 
> Is it legal for a device connected to a 3.0G physical link to 
> transmit ALIGNs as shown below during rate matching?
> (Note the ALIGN A3 followed by ALIGN A4 below)
> 
>  Time ---->
>  A1 - D1 - A2 - D2 - A3 - A4 - D3 - A5 - D4 - ...
>  
>  An = Align or Notify primitive (n = 1, 2, 3, 4)
>  Dn - Non-align dword (n = 1, 2, 3, 4, 5)
> 

If A4 is an ALIGN inserted for clock skew management (i.e. clock
frequency tolerance compensation, the 1/2048 extra ALIGN) that is how it
might look.  The rate matching pairs are A1/D1, A2/D2, A3/D3, then
A5/D4.  A4 is just added to the stream when needed.  (similarly, A3
could be the clock skew ALIGN, wich A4/D3 being the pair for rate
maching).

> Thanks,
> 
> Fred Dutton
> QLogic Corporation
> 949.389.6340

--
Rob Elliott, elliott at hp.com
Hewlett-Packard Industry Standard Server Storage Advanced Technology
https://ecardfile.com/id/RobElliott


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