SAS - PL_OC state machine - How many?

Elliott, Robert (Server Storage) Elliott at hp.com
Wed May 14 13:22:26 PDT 2003


* From the T10 Reflector (t10 at t10.org), posted by:
* "Elliott, Robert (Server Storage)" <Elliott at hp.com>
*


> * From the T10 Reflector (t10 at t10.org), posted by:
> * "Seto, Pak-lung" <pak-lung.seto at intel.com>
> *
> How many PL_OC state machines per PORT LAYER?
> 
> The way that is stated 8.2 of SAS v2g - "There is one PL_OC 
> state machine per port" - it seems match the state machine 
> description.
> 
> What if I have a "chip" that can support multiple links (e.g 
> 4 links) and wide port configuration.  First, I would assume 
> the "chip" will try to attempt to make wide port link
> initialization (in this example - 4 links) by
> sending out IDENTIFY frames on all 4 links with the same SAS 
> address.  In this case, if all the returning IDENTIFY frames 
> has the same SAS address, a 4-links wide port is established 
> - therefore - ONE PL_OC state machine.

Correct (assuming the chip chose to send the same address
out its 4 phys).

> What if the returning IDENTIFY frames has all different SAS 
> address and assume the "chip" will try to re-initialize the 
> link by [assigning?] different SAS addresses to each links 
> (assuming to make config stay in one SAS domain).

The chip should not change its own addresses (the ones it sends
out with outbound IDENTIFY address frames) just because the
inbound IDENTIFY address frames had different addresses.

It's OK to have the same SAS address in two domains at the
same time.  (this is why is serves as a "port identifier"
in the SCSI architecture but not as a "port name.")

A "port" is a virtual concept - a collection of phys
using the same SAS address that are attached to another
set of phys using the same SAS address.

> After link initializaiton, 4 single link - 4 ports configuration is
> established.  In this case - there will be 4 PL_OC state 
> machines with "ONE" port layer???

There are 4 ports in this case, each with a PL_OC state 
machine.  They're all at the port "layer" architecturally.

Each port object has its own transport layer state machines, 
port layer state machines, and one or more phys.

Each phy object has its own link layer state machines and 
phy layer state machines.

> Does the standard expect the SAS port layer being implemented 
> in firmware?
> Otherwise, how does hardware implemented SAS port layer can 
> dynamically support various number of PL_OC state
> machines (not easy)?

The standard is not very close to actual RTL implementation in the
port and transport layers.  The transport layer describes state 
machines being created and destroyed based on frame reception and
application layer requests.  This is not how real hardware works.

One way to conceptualize an implementation is as a single
"port layer" state machine that handles up to 4 ports 
simultaneously.  Everything it deals with has a
"port number" index appended to it.

> In the SAS spec, it does not mention about this kind of 
> situation and how
> the PL_OC state machine or port layer handle this situation?  Did I
> interpert the PL_OC state machine wrong?
> 
> Pak
> 

--
Rob Elliott, elliott at hp.com
Hewlett-Packard Industry Standard Server Storage Advanced Technology
https://ecardfile.com/id/RobElliott


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