SAS - PL_OC state machine - How many?

Evans, Mark Mark_Evans at maxtor.com
Wed May 14 13:01:03 PDT 2003


* From the T10 Reflector (t10 at t10.org), posted by:
* "Evans, Mark" <Mark_Evans at maxtor.com>
*
Hi Pak,

There is one port layer (and one PL_OC state machine) in each port.  There
is one PL_PM state machine for each phy.  The port has one SAS address.  The
phys in that port all report the one SAS address in their IDENTIFY frames.
How phys are aggregated into ports is not covered in the standard.  I could
see that simple devices that have a single phy permanently assigned to a
port could implement much of the port layer in hardware.  A hardware
implementation could be more difficult for a device that has more than one
phy that can be assigned dynamically to more than one port in a SAS device,
but it's all up to the implementer.

Regards,

Mark Evans
Maxtor Corporation

 -----Original Message-----
From: 	Seto, Pak-lung [mailto:pak-lung.seto at intel.com] 
Sent:	Wednesday, May 14, 2003 11:46 AM
To:	't10 at t10.org'
Cc:	Seto, Pak-lung
Subject:	SAS - PL_OC state machine - How many?

* From the T10 Reflector (t10 at t10.org), posted by:
* "Seto, Pak-lung" <pak-lung.seto at intel.com>
*
How many PL_OC state machines per PORT LAYER?

The way that is stated 8.2 of SAS v2g - "There is one PL_OC state machine
per port" - it seems match the state machine description.

What if I have a "chip" that can support multiple links (e.g 4 links) and
wide port configuration.  First, I would assume the "chip" will try to
attempt to make wide port link initialization (in this example - 4 links) by
sending out IDENTIFY frames on all 4 links with the same SAS address.  In
this case, if all the returning IDENTIFY frames has the same SAS address, a
4-links wide port is established - therefore - ONE PL_OC state machine.

What if the returning IDENTIFY frames has all different SAS address and
assume the "chip" will try to re-initialize the link by assing different SAS
addresses to each links (assuming to make config stay in one SAS domain).
After link initializaiton, 4 single link - 4 ports configuration is
established.  In this case - there will be 4 PL_OC state machines with "ONE"
port layer???

Does the standard expect the SAS port layer being implemented in firmware?
Otherwise, how does hardware implemented SAS port layer can dynamically
support various number of PL_OC state machines (not easy)?

In the SAS spec, it does not mention about this kind of situation and how
the PL_OC state machine or port layer handle this situation?  Did I
interpert the PL_OC state machine wrong?

Pak

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