sas-r03g issues
Jim.Coomes at seagate.com
Jim.Coomes at seagate.com
Thu May 1 16:20:53 PDT 2003
* From the T10 Reflector (t10 at t10.org), posted by:
* Jim.Coomes at seagate.com
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----- Forwarded by Jim Coomes/Seagate on 05/01/2003 04:04 PM -----
Flo Kung
(405) 324-3369 To: Jim Coomes/Seagate
cc: Judy Westby/Seagate
04/29/2003 03:49 Subject: Re: inconsistence in sas-r03g specification concerning hard reset(Document
PM link: Jim Coomes)
Jim,
I response to your blue are in Green. Thanks.
Rob,
Below are issues relating to HARD_RESET in sas_r03g.
7.2.5.8 HARD_RESET, page155, second sentence
"This primitive is only valid after the phy reset sequence and before the
identification sequence (see 4.4) and shall be ignored at other times."
There is no identification sequence after the phy reset sequence preceeding
HARD_RESET.
Suggest changing to:
"This primitive is only valid after the phy reset sequence without an
intervening identification sequence (see 4.4) and shall be ignored at other
times."
4.4.2 Hard reset, page 53, first sentence
"Between the link reset sequence and the IDENTIFY address frame, if a SAS
phy receives a HARD_RESET, it shall be considered a reset event and
initiate a hard reset of the port containing that phy."
The preceeding sequence should be a phy reset and not a link reset. 7.2.5.8
defines a valid HARD_RESET so the Identify address frame does not need to
be addressed here.
Suggest changing the sentence to:
"After a phy reset sequence, if a SAS phy receives a HARD_RESET, it shall
be considered a reset event and initiate a hard reset of the port
containing that phy."
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