sbp2 scatter/gather - near future trouble
lavarre at iomega.com
Wed Jul 4 06:54:36 PDT 2001
* From the T10 Reflector (t10 at t10.org), posted by:
* "Pat LaVarre" <lavarre at iomega.com>
My mail client tells me it quietly truncated my mail titled "sbp2
scatter/gather - "great loss" of speed". Continuing therefore where I left
> <ewa at apple.com> 07/04/01 01:00 AM
> t10 at t10.org
I'm also aware of people who think everything on a 16-bit ATA bus involves
pairs of bytes. Intensely influential people, like the author of Microsoft's
Win95B Esdi506.pdr Atapi. The world is too full of normal people. Soon
enough, we're going to find people building stuff that chokes unless aligned
to 64 bit boundaries.
What's the process we have in place to keep the newbie customer from buying
and shipping excessively cheap silicon? How do we stop this problem from
> Apple ... painfully double-buffer some I/O ...
I hear the Apple FireWire mass storage driver double-buffers as needed to
align data to x10 byte boundaries?
This is an interesting choice. x10 is often the size of a cache line on the
motherboard. As we've been discussing, we know we see trouble if for all
devices we guarantee no alignment. I wonder if we'll see trouble if for all
devices we guarantee no more than 4 byte alignment?
Thanks again in advance. Pat LaVarre <p.lavarre at ieee.org>
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