Bug in SPI-3 numbers

gop at us.ibm.com gop at us.ibm.com
Tue Jan 11 14:25:04 PST 2000

* From the T10 Reflector (t10 at t10.org), posted by:
* gop at us.ibm.com
The following notes indicate a problem with SPI-3. The SCSI committee has
decided to handle this with by placing the following statement in table C.2
of SPI-3 rev 13.
'Note: It may not be possible to meet these parameters with passive
In addition a comment has been added to the SPI-3 comments resolution
document that indicates SPI-4 should adjust either the voltage or current
values in table C.2 to allow passive current limiting devices to work.

Bye for now,
George Penokie

Dept Z9V  114-2 N212
E-Mail:    gop at us.ibm.com
Internal:  553-5208
External: 507-253-5208   FAX: 507-253-2880

---------------------- Forwarded by George Penokie/Rochester/IBM on
01/11/2000 04:18 PM ---------------------------

Bob Snively <Bob.Snively at EBay.Sun.COM> on 11/29/99 10:08:49 AM

Please respond to Bob Snively <Bob.Snively at EBay.Sun.COM>

To:   George Penokie/Rochester/IBM at IBMUS, Koji.Tamasu at fci.com,
      bob.snively at sun.com
Subject:  Bug in SPI-3 numbers


I have received the following from Koji Tamasu concerning incomplete
and conflicting documentation of the charging circuitry in SPI-3.  I expect
there are three possible solutions:

a)  Require active or non-linear circuitry in the backplane to
    meet the requirements specified by the document.

b)  Reduce the specified static current use allowable by the not-yet-fully
    mated drive to a level lower than 1 amp, so that linear passive
    could be used and meet all the specified numbers.

c)  Increase the low end voltage tolerance so that a lower voltage would
    be allowed during the static partially inserted case.

In addition, if it is not already clear, we should indicate that the
surge and static continuous current/voltage requirements apply during the
entire time that the drive is inserted, whether mated or unmated.  In
normal implementations, the charging supply voltages would not be providing
any significant current after the drive was fully mated.


------------- Begin Included Message -------------

Date: Mon, 22 Nov 1999 16:48:06 -0800
From: Koji Tamasu <Koji.Tamasu at fci.com>
X-Accept-Language: en
MIME-Version: 1.0
To: Bob Snively <Bob.Snively at EBay.Sun.COM>
Subject: Re: Understanding the SFF-8046 2.7 and T10/1302D Rev 10
Content-Transfer-Encoding: 7bit


Thank you very much for the clarification.

For a SCA-2 backplane design that I was working on, I plan to use series
current limiting resistors optimized to meet the maximum surge current of
6A.  The results are as follows:

0.68 Ohm for 3.3V CHARGE (all requirements met).

0.90 Ohm for 5V CHARGE,
minimum CHARGE voltage of 4.15V (-17%) at 0.85A continuous (FAIL), or
1A continuous at CHARGE voltage of 4.01V (FAIL).
* Note that there is no value to allow for both 1A continuous at 4.15V
at the same time of meeting the maximum surge of 6A.

2.27 Ohm for 12V CHARGE,
minimum CHARGE voltage of 10.56V (-12%) at 0.85A continuous (FAIL), or
1A continuous at CHARGE voltage of 9.50V (FAIL).
* Note that there is no value to allow for both 1A continuous at 10.56V
(-12%) at the same time of meeting the maximum surge of 6A..

These values take in account +/- 1% supply voltage regulation and the usage
of 5% tolerance resistors.

Does the requirements of:
1)    maximum surge current of 6A.
2)    maximum continuous current of 1A by the drive.
3)    CHARGE supply voltage, minimum tolerance.
apply all when the CHARGE pins are mated, but before the MATED pin mate?

Thank you.

Koji Tamasu

Bob Snively wrote:

> See answers below:
> >
> >    I am sorry to bother you for information regarding the SCA-2 segment
> >of the SPI-3 draft.  I am working on understanding the CHARGE signal
> >requirements as they pertain to the SCA-2 connectors.  The sections that
> >I require clarification on is Table 6-4 of the SFF-8046 Rev 2.7 and on
> >table C-2 of Annex C of the T10/1302D revision 10 draft.  My goals in a
> >SCA backplane design is simple.  Meet the requirements stated in the
> >SFF-8046 Rev 2.7 specification AND incorporate a passive design (void of
> >active components).  One solution is to use current limiting resistors
> >to limit the 6A current surge and minimize the IR drop to allow the
> >target drive to draw a maximum of 1A and still meet the voltage
> >requirements of the CHARGE signal.
> >
> >Dilemma:
> >    Finding a resistor value for 3.3 to meet the surge of less than 6A,
> >1A continuous, and voltage tolerance at 1A is not a problem.  However,
> >with +5V CHARGE and +12V CHARGE all requirements cannot be meet at the
> >same time using a current limiting resistor.  Using this solution
> >requires that either the voltage tolerance is too tight or the maximum
> >continuous current of 1A from the drive is too much.  It appears the
> >limiting for maximum surge current and minimizing IR drop to the drive
> >are mutually exclusive.
> >
> >Questions:
> >    Please confirm that the responsibility of the 6A limit to the surge
> >should be incorporated into a SCA-2 backplane design.
> >
> The surge limit is the responsibility of the backplane or the circuits
> feeding the backplane.  The surge control is not the responsibility of
> the disk drive.
> >    Please confirm that the responsibility of the 1A continuous current
> >maximum is the responsibility of the drive vendor.
> >
> The requirement that less than 1 amp continuous current is used is the
> responsibility of the drive vendor.
> >    Does the voltage tolerance (5V +5%/-17%, 12V +5%/-12%, and 3.3V
> >+5%/-24%) apply WITH the drive drawing the 1A maximum continuous
> >current?
> That was the intent, although I have not checked the arithmetic in SPI.
> >
> >    Is the CHARGE signal intended to prevent dips on the power rails,
> >over current damage to the CHARGE pins, and prevent in-rush current
> >damage to the drives?
> >
> Principally to prevent power rail dips and charge pin damage.
> >    Are drive vendors depending on this surge current limit?
> >
> Only if they are designing their drives to be used in a hot plug
> environment.  Most are depending on this.
> >    Do you have any examples of passive CHARGE circuits that can meet
> >all the requirements at the same time?
> >
> We used an active circuit. I believe that this should be possible with
> passive circuit, although I have not checked the arithmetic.
> >    Does the surge current of 6A refer to charging an ideal capacitor (a
> >virtual short to GND) or does it depend on the ESR of the capacitors to
> >help the rate of charge?
> >
> The surge limit refers to an ideal capacitor, which most boards will
> approximate very closely during the power-up procedure.
> >
> >    Again, I am sorry for the long winded message.  I appreciate any
> >information that you can provide to clarify my concerns about the CHARGE
> >signals.  The piece that is missing from the specification is the
> >"intent" or "reason why" a requirement is described.  Thank you very
> >much for your time in this subject.
> >
> >Sincerely,
> >
> >Koji Tamasu
> >FORCE Computers, Inc.
> >5799 Fontanoso Way
> >San Jose, CA. 95138-1015
> >(408) 369-6215
> >
> >

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