SPI-3 technical change

gop at us.ibm.com gop at us.ibm.com
Fri Nov 19 15:07:15 PST 1999


* From the T10 Reflector (t10 at t10.org), posted by:
* gop at us.ibm.com
*
Sriram,
Opps. You are correct. There is nothing wrong with the wording in the 2nd
paragraph. So the shall will stay a shall and not change to a should or a
may.
That only leaves the other small change as shown below. Thanks for pulling
us back to reality!!

Change the 8th paragraph 1st sentence from:

The status field contains the status of a task that completes with a status
other than GOOD.

to:

The status field contains the status of a task that completes.


Bye for now,
George Penokie

Dept Z9V  114-2 N212
E-Mail:    gop at us.ibm.com
Internal:  553-5208
External: 507-253-5208   FAX: 507-253-2880



Sriram Srinivasan <srirams at propwash.co.lsil.com> on 11/19/99 04:15:13 PM

Please respond to Sriram Srinivasan <srirams at propwash.co.lsil.com>

To:   George Penokie/Rochester/IBM at IBMUS
cc:   t10 at t10.org
Subject:  Re: SPI-3 technical change





     I'm sorry, am I missing something here?  If u want to send some
information in the status IU EVEN though status is zero (since there are no
status codes for packetized failures), wouldn't u have the RSPVALID bit
(bit 0
of byte 2 in status IU) set to a 1?  This then would mean (according to the
following sentence from section 14.2.5, paragraph 2):

If a task completes with a GOOD status, a snsvalid bit of zero, and a
rspvalid bit of zero then the target <<shall>> set the data length field in
the SPI L_Q information unit (see 14.2.2) to zero.

     that the target, in the first place, would not have sent a DATA LENGTH
of zero in the preceeding SPI L_Q IU.  In other words if a status IU needs
to
send some info. despite the status being a zero, wouldn't the RSPVALID bit
be
set to a 1?  Or is my understanding on this issue skewed?  Please calrify.

     Thanx,
     Sriram

----------------------------------------------------------------------------


Sriram Srinivasan,                 Sriram.Srinivasan at lsil.com
ASIC Design Engineer, LSI Logic,         Phone : (970) 206 5847
2001 Danfield Ct., Ft. Collins, CO 80525      FAX   : (970) 206 5244
-----------------------------------------------------------------------------

>* From the T10 Reflector (t10 at t10.org), posted by:
>* gop at us.ibm.com
>*
>Gene,
>With the current 'shall' wording the target is required to place a zero in
>the data length field of the L_Q IU. As a result there is no Status IU
>sent. This allows better performance because needless information (i.e., a
>bunch of zeros in the Status IU to indicate a good completion) is not
>transferred. The problem is; in a few cases, even though status is zero
>there may be information that needs to be sent in the Status IU that is
>currently not allowed because of the 'shall'. Placing a 'should' at that
>point fixes the problem.
>
>Bye for now,
>George Penokie
>
>Dept Z9V  114-2 N212
>E-Mail:    gop at us.ibm.com
>Internal:  553-5208
>External: 507-253-5208   FAX: 507-253-2880
>
>
>
>Gene_Milligan at notes.seagate.com on 11/19/99 11:59:49 AM
>
>To:   George Penokie/Rochester/IBM at IBMUS
>cc:   t10 at t10.org
>Subject:  Re: SPI-3 technical change
>
>
>
>
>What is the reason for changing "shall" to should"?
>
>Gene
>
>
>
>
>
>*
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