vince_bastiani at corp.adaptec.com
Mon Feb 22 13:37:16 PST 1999
* From the T10 Reflector (t10 at symbios.com), posted by:
* "Vince Bastiani" <vince_bastiani at corp.adaptec.com>
Release Glitch on LVD Bus:
In Response to Bill Galloway=92s question about a release glitch on the
line (e.g BSY) when one or more devices release the line, we performed
several simulations using SPICE on a transmission line model that we
developed. We simulated 10 ft and 40 ft cable with
Zo =3D 120 ? differential. The two configurations are as follows:
To simulate real devices, we used 15 pf capacitors to ground on each
line, for the drivers in the middle (i.e. D2 to D5 and D2 to D9). In all
our simulations we looked at the differential signals.
First we turn on D1 at time 100 ns. Now we have 500 mV differential on
the line, say BSY. Then D2 starts driving at 300ns and the others follow
at fixed time steps. At time 500 ns all the drivers except D1 release
the line and a glitch occurs.
For 10 ft cable, the worst-case glitch amplitude (at D4) was 225 mV, and
the final value of the line was 500 mV. The duration of the glitch since
the start of the release until the line is settled is about 50 ns.
For 40 ft cable, the worst-case glitch amplitude was 225 mV, and the
final value of the line was 480 mV. The duration of the glitch since the
start of the release until the line is settled is about 250 ns.
In conclusion, a glitch does occur whenever one or more drivers release
the line, and the amplitude and duration of the glitch depends on the
length of the cable, how many drivers are there and their type (i.e.
voltage or current, ideal or real, =85). While these release glitches
exist, in the above cases they are not sufficient to be detected by the
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