QAS Round 2

Bill Galloway BillG at
Tue Feb 2 13:46:44 PST 1999

* From the T10 Reflector (t10 at, posted by:
* "Bill Galloway" <BillG at>
I am trying to clean up the description of ATN in SPI-3 and ran into more
problems with QAS. (Big surprise)

A selection after normal arbitration is well defined. The initiator sets the
data bus, parity and ATN to the correct value (in any order and with any
timing) and then two system deskews later releases BSY. The initiator then
waits a bus settle to look for a response.

For QA the arb winner gets the bus into a state with SEL asserted and BSY
deasserted. It is relying heavily on the bus settle filter during selection
to keep the arb loser from thinking that they are selected. There is no time
specified for when ATN is asserted relative to the data bus and parity.
When ever the bus has been stable for 400ns some device may claim the
selection cycle, even if the arb winner had not finished setting up the
selection cycle.


Bill Galloway
BREA Technologies, Inc.
P: (281) 530-3063
F: (281) 988-0358
BillG at

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