Period Tolerance
Bill Galloway
BillG at breatech.com
Wed Sep 9 19:10:43 PDT 1998
* From the T10 (formerly SCSI) Reflector (t10 at symbios.com), posted by:
* "Bill Galloway" <BillG at breatech.com>
*
The transmit period tolerance in the SCSI spec needs to encompass two types
of timing errors.
First is the nominal frequency of the transmitter. This is the original
reason that I introduced tolerance into the SCSI spec in 1994. Compaq had a
design that used a single PLL to generate all motherboard frequencies. The
nominal frequency was 40.01 MHz. This design broke one vendors disk drive.
The tolerance chosen in 1994 of 0.25% was small but it covered the existing
problem. I believe that this number could be reduced to 0.1% or 1000ppm.
Second is transmitter jitter. I believe that this is why Tak Asami of
Adaptec proposed the increase to 1 Ns. I have not talked to Tak but most
PLL's I am aware of do not have that much jitter. I thought they were in
the range of
+/-250ps. For the transmitter the +250ps can be ignored and only the -250ps
must be considered. I can believe that there are PLL's with worse jitter
than this but I have a hard time believing that they have 1ns of jitter.
(Comments Tak???).
The receive tolerance should be twice the transmit tolerance if you want to
assume that the sources of error are the same and that they can add up in
the worst possible way.
I hesitate to mention this but there is a far larger source of jitter in the
system. I have seen inter-symbol interference cause a 5ns shift in the edge
of a single-ended ultra signal. I have not measured it for LVD but I am sure
that some amount of shift is present. This jitter must be accounted for
somewhere.
Bill Galloway
BREA Technologies
(281) 530-3075
BillG at breatech.com
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