Duncan.Penman at quantum.com
Thu Sep 3 17:46:27 PDT 1998
* From the T10 (formerly SCSI) Reflector (t10 at symbios.com), posted by:
* Duncan Penman <Duncan.Penman at quantum.com>
We have no new timing studies to present for the September T10 meeting.
There are a couple of points to follow up on from the July meeting that I
would like to document here, as I won't be able to make St. Petersburg
1. In T10/98-199r0, which showed setup and hold times for different data
sequences, some people noted that there appears to be some low pass
filtering of the data bit waveform that doesn't appear in the REQ waveform.
I.E., DB5 is made up of smooth curves while REQ shows some sharp excursions.
Unfortunately I still haven't been able to duplicate the configuration where
the waveforms were captured. The LVD backplane I used was a loaner that has
been returned to the vendor that supplied it. No luck so far in getting it
2. In general, the signals on this same LVD backplane looked quite good,
even 11+ meters away from the signal source. The question was raised
whether we had looked at any other backplanes. In September the answer was
no. However, last week we got one day with a second LVD backplane and the
contrast was extreme. While the first backplane would run 6 devices error
free at Fast-40 speed on a 12m bus, this one failed at Fast-40 speed with a
single device on a 2m cable. At .5m it seemed solid, and that is the
configuration in which it ships. The initial look at waveforms showed very
poor signal quality on the bit causing the most bus parity errors. I expect
to have a few more days with this backplane in late September to see whether
the problem is due to poor design or an out-of-spec component such as an
onboard terminator chip. So we now have two examples, one good and one bad.
The reason for mentioning this second case now is to raise a warning flag
that backplanes, with or without attached motherboards, are likely to be the
Achilles heel of LVD at higher speeds. While requirements for cable
configurations are well documented in SPI-2 and SPI-3, requirements or
guidelines for backplane configurations are pretty mysterious. Also
probably pretty tough to develop, but most LVD drives will be going into
disk arrays where backplanes are the norm. An informative annex, at least,
dealing with backplane considerations for SCSI buses seems like a desirable
addition to SPI-3. I'll be happy to contribute to the effort but don't feel
qualified to be the primary author. Comments?
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