Implementation details for LVD/Single Ended mode changes

George Penokie gop at
Thu Sep 25 12:41:23 PDT 1997

* From the T10 (formerly SCSI) Reflector (t10 at, posted by:
* George Penokie <gop at>
Most of the questions you ask have been nailed down in SPI-2  Rev 15.

    Our questions are...

    1. Are host adapter implementors planning on asserting SCSI RST when
       they detect a bus mode change?  If so, will it be after the 100 mS

A1) Host adapters can and do assert RST anytime. But it should not make any
difference because the mode change has the same effect on a target as asserting

    2. What kind of sense data would the host adapter implementors like to
       see reported by a the target after a bus mode change?

A2) Section of SPI-2 rev 15 states the ASC/ASCQ shall be TRANSCEIVER

    3. Bus mode changes are not supported when the bus is active in SPI-2. But

A3.1) That will probably change in the very near future as I hear there will be
a proposal
to remove that restriction.

       if we detect that we are currently connected for a command after the
       2 mS timer for a  bus mode change.  We are planning on forcing an
       unexpected bus free.  Any thoughts on this issue.

A3.2) In SPI-2 rev 15 the following has been add to the list of things a bus
free is
expected to follow:

i)after a transceiver mode change.

And the following has been added to section

Any SCSI device that detects a transceiver mode change shall:
a)set the data transfer width to eight-bit transfer mode
b)set the data transfer mode to asynchronous data transfer mode, and
c)targets switch to a BUS FREE phase.

    4. One option for handling bus mode changes previously discussed on the
       reflector was treating it like a SCSI bus reset.  We're not sure all
       the activities required per SCSI-2 for the hard reset alternative
       should be executed on a bus mode change.  The ones we're thinking
       should not be executed include re-initializing mode pages and
       re-starting SCAM.  The grayer ones are things like clearing out
       contingent allegiance and reservations.  What would host adapter
       implementors like to see here?

A4) SPI-2 requires a hard reset as defined in SAM which is the same as what a
hard reset was in SCSI-2. The hard reset was selected over other options because
it will work across bridges and will leave all devices in a known state. Are
you proposing
we add a new kind of reset into SCSI-3?!?!?
I do not see any gray areas when it comes to hard reset. Everything gets wiped
except persistent reservations. I'm no expert in SCAM but the only thing that
can cause
a bus mode change is adding a new device to the bus which should SCAM to rerun

Bye for now,
George Penokie




    Patty Pagels                            Phone (508) 770 5690
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