More SPI-2 comment...

Tak Asami asami at
Fri Sep 5 10:02:39 PDT 1997

* From the T10 (formerly SCSI) Reflector (t10 at, posted by:
* Tak Asami <asami at>
Gene Milligan wrote:
> Regarding Tak's comments on clock jitter, can anyone remember who brought this
> requirement into Fast-20?

I don't recall names, but I believe that was someone from Compaq.
He questioned that when we said "minimum ...nsec", if it really mean 
At the time we were dealing with 10MHz system going on 20, and he was
concerned that if 100nsec cycle time is the minimum, and the SCSI
chip is using 10MHz crystal clock (or multiple thereof.. very few of
us were using PLL at the time), then Gaussian distribution dictates
that half the product we ship are illegal (unless you ship it with
9.99MHz crystal).
So he wanted a reasonable tolerance specified.

What it meant for us silicon folks is that we can no longer assume
the next REQ/ACK will come 100nsec later.  If it came 99nsec later,
we have to deal with it.  Since that violates Nyquist's criteria for
many design at the time, a lot of innovations had to be made to 
accomodate.  This is why it became virtually unnecessary to maintain
this spec any more.

Tak Asami ==========================================================
Adaptec / ITC
P.O. Box 57020 Irvine, CA 92619-7020
(714) 455-8202 / Fax: (714) 455-8102
asami at
* For T10 Reflector information, send a message with
* 'info t10' (no quotes) in the message body to majordomo at

More information about the T10 mailing list