Device Capacitance balance

Kevin Gingerich k-gingerich at
Wed Sep 3 09:43:15 PDT 1997

* From the T10 (formerly SCSI) Reflector (t10 at, posted by:
* Kevin Gingerich <k-gingerich at>
The 0.5 pF maximum difference is between the capacitance of each line of a
balanced pair to signal ground at the input of the device. If you run the
paired lines on opposite sides of the board, you are not balanced and will fail
this requirement. If it hurts when you do that, don't do that! 

The 2 pF range across all lines was to limit load-induced skew and will be more
affected by the proximity effects discussed by Paul. The common-mode induced
differential noise from imbalance must fit into the 55 mV differential noise
budget. Our system model (120 mV Voc(pp), 355 mV ground noise, 0.5 pF
differences, 135 ohm cable, and 15 bridged receivers) and a 40 MHz noise source
would generate about 60 mV differential noise under a worst-case scenario (see
previous posting). Statistically, this would be an extremely rare occurrence. 

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