Valid SCAM Selection?

Tony DeLaCruz tdelacru at QNTM.COM
Wed Jun 18 11:46:55 PDT 1997

* From the SCSI Reflector (scsi at, posted by:
* tdelacru at (Tony DeLaCruz)

The target is to look at the bus after the BSY signal has been released, looking
for SEL and MSG asserted. The spec. states that all DATA BUS signals are to have
been released prior to the release of the BSY signal, therefore none of the DATA
BUS signals should be driven to require the use of the I/O signal.


Tony De La Cruz

Quantum Corporation
500 McCarthy Blvd.
Milpitas, CA 95035
e-mail: tdelacru at

-----Original Message-----
From:   Jeff Williams <JWILLIAM at> 
Sent:   Wednesday, June 18, 1997 2:24 PM
To:     Tony DeLaCruz <tdelacru at>; John Lohmeyer
<John.Lohmeyer at Symbios.COM>
Cc:     SCSI Reflector <scsi at Symbios.COM>
Subject:        RE: Valid SCAM Selection?

The problem is that some chips require that I/O be asserted
in order to place any data onto the SCSI bus.  We do not
check I/O in order to avoid this problem.


Jeffrey L. Williams                    Office: (507) 286-7589
Western Digital Rochester                 Fax: (507) 286-7528
Enterprise Storage Group       e-mail: jwilliam at

From:  John Lohmeyer[SMTP:John.Lohmeyer at Symbios.COM]
Sent:  Wednesday, June 18, 1997 12:53 PM
To:  Tony DeLaCruz
Cc:  SCSI Reflector
Subject:  Re: Valid SCAM Selection?

* From the SCSI Reflector (scsi at, posted by:
* John Lohmeyer <John.Lohmeyer at>

The SPI Amendment #1 says the following about SCAM selections:

"B.4.1 Initiation
A device initiates the SCAM protocol by first winning bus arbitration,   
performing SCAM selection. The device may arbitrate using its current ID   
it may arbitrate without an ID. After winning arbitration the device has
the BSY and SEL signals asserted. It shall release all DATA BUS signals   
assert the MSG signal, then wait at least two deskew delays and release   
BSY signal. It shall maintain this pattern of the SEL and MSG signals
asserted with the BSY signal released for a minimum of a recommended SCAM
selection response time, then release the MSG signal. After releasing the
MSG signal the device shall wait, using wired-OR glitch filtering (see
table 1), until the MSG signal has been released by all other devices.

Level 2 SCAM initiators and SCAM targets that have not yet been assigned   
ID recognize SCAM selection if a pattern of the SEL and MSG true and the
BSY signal false is detected. After a variable delay, devices responding   
SCAM selection release the MSG signal, then wait, using wired-OR glitch
filtering, until the MSG signal has been released by all devices. SCAM
targets should release the MSG signal quickly, perhaps never asserting it
at all. SCAM initiators should wait a SCAM selection response time before
releasing the MSG signal."

I'm sure you've noticed that nothing is said about the I/O signal.
Therefore, the I/O signal should not be asserted during a SCAM selection
and the I/O signal should not be tested to detect a SCAM selection.  As a
general rule in protocol descriptions (I'm not sure if we actually said
this in SPI), signals not mentioned should remain in their last state, in
this case, false.

It sounds to me like you've run into two implementations that are both
'flawed'.  If either were fixed, it would work with the other
implementation.  By 'flawed', I mean not optimal.  I'm not sure that   
implementation actually violates the standards (although I think driving
I/O true should be illegal if it is not already!).


John Lohmeyer                 E-Mail: john.lohmeyer at
Symbios Logic Inc.             Voice: 719-533-7560
4420 ArrowsWest Dr.              Fax: 719-533-7036
Colo Spgs, CO 80907-3444    SCSI BBS: 719-533-7950 300--28800 baud

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