SBP-2 Data Buffer Alignment

PJohansson at aol.com PJohansson at aol.com
Thu Jul 10 16:58:53 PDT 1997


* From the T10 (formerly SCSI) Reflector (t10 at symbios.com), posted by:
* PJohansson at aol.com
*
In a message dated 97-07-10 11:50:24 EDT, packer at eng.adaptec.com (John Packer
x2146) writes:

<<I assumed the purpose of quadlet alignment is due to the nature of 32 bit
computers ... they are quadlet aligned.  This even works with the 16 bit
machines.  Now you are saying allow the data buffers to be aligned to any
boundary.  The packets to fetch data are still quadlet aligned.  Are you
expecting the "host" to fetch 32 bits of data out of two 32 bit memory
addresses, then build the 1394 quadlet while saving some for the next 1394
quadlet?  Same is true for the store to memory.  I just want to make sure
that the target is not expected to align the 1394 quadlets to the system
quadlets.>>

The relationship between system memory addresses and the 1394 addresses used
to reference them is a matter for the adapter hardware / software and not
something that the target need worry about (with the exception of page
boundary information supplied in the ORB).

If a block read for 5 quadlets is received for a 1394 address such as 0x0001
and this requires the host adapter hardware / software to fetch two different
quadlets to assemble the single response packet, that's exactly whats
implied.

The target is not expected to split such a request into separate block read
requests that do not cross quadlet boundaries. The target doesn't even know
the relationship between system memory addresses and Serial Bus
addresses----except that page boundaries may occur if the ORB says so.

Regards,

Peter Johansson

Congruent Software, Inc.
3998 Whittle Avenue
Oakland, CA  94602

(510) 531-5472
(510) 531-2942 FAX

pjohansson at aol.com

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