[T10] Copy of revised chapter 6 showing approved changes

Tom Friend Tom.Friend at taec.toshiba.com
Fri Sep 29 08:56:27 PDT 2017


Can we agree on the needed changes?


1.       Do we need to make any changes to SPL-4, or is the current state adequate?

2.       Do we need better definitions of the transactions occurring at phy and link layers for SPL-5?

TIA,

Tom Friend

Director, Industry Standards
Toshiba America Electronic Components, Inc.
SSD Business Unit
55 Trimble Road, San Jose, CA  95134
Mobile: +1(360)860-1831



From: t10-bounces at t10.org [mailto:t10-bounces at t10.org] On Behalf Of Patrick Hery
Sent: Thursday, September 28, 2017 10:18 PM
To: Gerry Houlder <gerry.houlder at seagate.com>; Tim Symons <tim.symons at microsemi.com>
Cc: T10 Reflector <t10 at t10.org>
Subject: Re: [T10] Copy of revised chapter 6 showing approved changes

Hi Gerry & Tim,

I had some discussion with my engineering team and I’d like to relay a couple of points that came up in our discussion.




1.       My recollection of the discussion during the T10 meeting was that item e) “scrambled idle segments” was originally removed from the exclusion (don’t count for completion) list was because the group thought that these were not identified as “deletable primitives” and therefore should be counted for completion.  But, further examination revealed that these should NOT be counted for completion. (not because these were “deletable primitives” but because they are discarded at the phy layer directly).  This means that the original reason to strike item e) “scrambled idle segments” from the list was mistaken.  It was taken off the list because it was thought it should be counted and not skipped, but it needs to be skipped.

2.       The current argument to have item e) “scrambled idle segments” stricken from the list seems to be that sections 6.2.4.6 and 6.2.4.7 are referring to the link layer only, but this doesn’t seem to be the case.  The start of the sentence in question is “Receivers shall detect…”  It doesn’t say “The link layer shall process...” or some similar language indicating that it is only referring to link layer processing.  I know this is in the link layer chapter, but to us the words the “Receivers shall detect…” seem very unambiguous as to requirements on the phy layer hardware (i.e. the transmitter and receiver).  It seems to us that the transmitter and receiver are clearly in the phy layer.  So there appears to be some mixed discussion in this chapter between phy layer and link layer.  For this reason too, we think item e) “scrambled idle segments” belong in the exclusion lists in sections 6.2.4.6 and 6.2.4.7.

3.       We understand about the figures and the desire to keep consistency with other diagrams in other sections so we are ok with the corrected figures proposed by the committee, but we had a question about the figures included in the document “SPL4 chapter6-updated.pdf” provided for review.  It seems to us that figure 131 and 133 do not have the updated figures showed in the meeting.  We do not see the “idle dword segments” reference there.


Best regards
Patrick Hery


From: t10-bounces at t10.org<mailto:t10-bounces at t10.org> [mailto:t10-bounces at t10.org] On Behalf Of Patrick Hery
Sent: Wednesday, September 27, 2017 2:45 PM
To: Gerry Houlder; Tim Symons
Cc: T10 Reflector
Subject: Re: [T10] Copy of revised chapter 6 showing approved changes

Hi Gerry & Tim,

Thank you for the clarification, I think I understand your points.  I will take this back and discuss with my team internally.    If I learn something new to add I will post it here without delay.

BTW is there another section where it says that the scrambled idle segments are never given to the link layer?  Maybe that text could help my engineers.

Best regards
Patrick Hery

From: Gerry Houlder [mailto:gerry.houlder at seagate.com]
Sent: Wednesday, September 27, 2017 2:22 PM
To: Tim Symons
Cc: Patrick Hery; Curtis Stevens; T10 Reflector
Subject: Re: [T10] Copy of revised chapter 6 showing approved changes

So Patrick, your engineers at Toshiba re correct that a scrambled idle segment is something that is deletable. The issue for SPL-4 standard is that this figure and text is intended to describe only those items that are handled at the link layer. Since the scrambled idle segment is deleted at a lower level than the link layer, they will never arrive at the link layer and do not have to be described in that part of the state machine.

The scrambled idle segment is described as deletable in the next lower level state machine, so it is not overlooked by SPL-4.

On Wed, Sep 27, 2017 at 1:19 PM, Tim Symons <tim.symons at microsemi.com<mailto:tim.symons at microsemi.com>> wrote:
Patrick,

I strongly disagree – as we discussed during the meeting, the Scrambled Idle segment is NOT in the class of deletable primitives. It is a packet that is removed at the phy layer, just as the ALIGN primitives are removed for dword mode.
The reason for the list of deletable primitives, deletable binary primitives and deletable extended primitives is because these are primitives that may be processed by the link layer, which means text is required to describe ignoring them.

The revised diagrams are accurate.
Please provide more information if your engineering team still does not understand the resolution.

Regards,
Tim.

From: t10-bounces at t10.org<mailto:t10-bounces at t10.org> [mailto:t10-bounces at t10.org<mailto:t10-bounces at t10.org>] On Behalf Of Patrick Hery
Sent: Wednesday, September 27, 2017 10:35 AM
To: Curtis Stevens <curtis.stevens at wdc.com<mailto:curtis.stevens at wdc.com>>; T10 Reflector <t10 at t10.org<mailto:t10 at t10.org>>
Subject: Re: [T10] Copy of revised chapter 6 showing approved changes

EXTERNAL EMAIL
Hi Curtis,

Yes, we believe there is still more work to do.

1.       Our engineers tell us that we still need item e) “a scrambled idle segment” added to the list in sections 6.2.4.6 and 6.2.4.7 as it was originally listed in r0 of proposal 17-135.  This is because even though a scrambled idle segment is not identified as a “deletable primitive” it is still discarded and thus should be in the list of items that are not supposed to be counted.

2.       We believe the original diagrams provided in r0 of 17-135 (figures 131 & 133) are correct and are more informative than the ones selected because they show both a proper detection and a missed detection due to insufficient dwords.  We would like to see these added back into chapter 6.

Best regards
Patrick Hery
From: t10-bounces at t10.org<mailto:t10-bounces at t10.org> [mailto:t10-bounces at t10.org] On Behalf Of Curtis Stevens
Sent: Wednesday, September 27, 2017 9:50 AM
To: T10 Reflector
Subject: [T10] Copy of revised chapter 6 showing approved changes

[Forwarded on behalf of Joe Breher]

I am not ‘one of the SPL experts’. That said, this is somewhat disconcerting. IIUC, is this saying that we still have work to do in correcting SPL-4 before reinitiating public review?

----------------------------------------------------------

Joe Breher
Storage Architecture Technologist

Western Digital®
Standards Setting Organization
San Jose Research Center
+1 (478) 2-Breher
+1 (478) 227-3437<tel:(478)%20227-3437>

On Sep 25, 2017, at 8:59 AM, Tom Friend <Tom.Friend at taec.toshiba.com<mailto:Tom.Friend at taec.toshiba.com>> wrote:

I have received the following from our engineering department concerning the SPL-4 edits discussed in our last T10 F2F meeting. Can one of our SPL experts reply to this please?

TIA,

Tom Friend

Director, Industry Standards
Toshiba America Electronic Components, Inc.
SSD Business Unit
55 Trimble Road, San Jose, CA  95134
Mobile: +1(360)860-1831<tel:(360)%20860-1831>


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