Proposal posted: SAS-3 addition of POWER DISABLE

Alvin Cox alvin.cox at seagate.com
Fri Aug 17 14:41:42 PDT 2012


Formatted message: <a href="http://www.t10.org/cgi-bin/ac.pl?t=r&f=r1208175_f.htm">HTML-formatted message</a>

*T10 P3 repurposing questions and answers:*
1.     Felton, Mickey mickey.felton at emc.com
Q: How long after stable 12V / 5V is the circuitry ready?
A: This is target device implementation specific. If the signal was
asserted when power is applied, the target device would not power up.
Q: Could it be asserted while power is ramping up?
A: Yes.
Q: Does the input signal on the drive have any special edge or level
requirements?
A: Level requirements are defined in the table. Target devices should
implement some sort of hysteresis.
2.     Chuck Gibson Chuck.Gibson at sandisk.com
Q: Is there an external pull-down on the POWER DISABLE line, or does the
SAS target device need to provide one?
A: The SAS target device needs to provide one if required.
Q: Table 69 specifies the maximum value for Asserted current (power
disabled) as 5.0 µA, which doesn’t allow for much of a pull-down.
A: The purpose was to minimize the load on the system. This value is
negotiable. One consideration is to maintain compatibility with the
requirements for SATA DEVSLP, which has a 10.0 µA maximum.
Q: What would be the behavior if a SAS target device supporting POWER
DISABLE is plugged into a legacy backplane?
A: Normal operation unless the legacy backplane provides 3.3V on P3. If
3.3V is provided by the system on P3, the target device will not power up.
3.     Besmer, Brad Brad.Besmer at lsi.com
Q: There is no associated support in SPL-2 for this (ie. Identify /
Discover). How does the attached entity know if the target device supports
this behavior or not?
 A: TBD. We want to get approval of the repurposing prior to determining
the best means of support notification.
Q: What happens to the link-state when the POWER DISABLE signal is asserted?
 A: The device completely shuts down since the result is the same as
turning off D.C. power to the device.
Q: How does attached device know if the device has been hot-swapped with a
different device?
A: Please clarify what type of device. The target device performs a power
on reset function when the POWER DISABLE signal is negated. Full
initialization is performed as if a new device is present.
Q: What other system-level impacts does this have?
A: It allows the system to control the D.C. power at a target device. Of
particular benefit is a case where communication to a target device is hung
and a POR is required to re-establish the connection. Instead of physically
removing the device from a system that does not have independent power
control at each device slot, the signal may be asserted, then disabled to
provide the same function as removing and reinserting the device or
independently removing and enabling D.C. power to that individual device
location.
4.     T. C. McNally via sanmina-sci.com
 Q: Is the pin choice for POWER DISABLE negotiable?  I would ask for this
function to be on P1.
A: P3 is consistent with changes made by SATA-IO. There are a significant
number of extent systems that require shorting of P1 to P2. We do not see
changing to P1 as a viable option.
On Fri, Aug 17, 2012 at 9:52 AM, T. C. McNally <tc.mcnally at newisys.com>wrote:
> The main reason is we, Newisys, currently use P1 for this function.
>
> Thanks,
>
> T. C. Mc Nally
> System Engineer
> 719-884-8733
>
>
>
> On Fri, Aug 17, 2012 at 8:44 AM, Felton, Mickey
<mickey.felton at emc.com>wrote:
>
>> Can you provide a reason?****
>>
>> ** **
>>
>> I believe the reasoning from Alvin on 3 was because 1 and 2 were always
>> connected together on “other systems”..****
>>
>> ** **
>>
>> ** **
>>
>> *From:* T. C. McNally [mailto:tc.mcnally at newisys.com]
>> *Sent:* Friday, August 17, 2012 8:51 AM
>> *To:* Besmer, Brad
>> *Cc:* Felton, Mickey; Alvin Cox; T10 Reflector
>> *Subject:* Re: Proposal posted: SAS-3 addition of POWER DISABLE****
>>
>> ** **
>>
>> All,
>>
>> Is the pin choice for POWER DISABLE negotiable?  I would ask for this
>> function to be on P1.
>>
>> ****
>>
>> Thanks,
>>
>> T. C. Mc Nally
>> System Engineer
>> 719-884-8733****
>>
>>
>>
>> ****
>>
>> On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad <Brad.Besmer at lsi.com>
>> wrote:****
>>
>> Alvin,****
>>
>>  ****
>>
>> Few discussion items:****
>>
>>  ****
>>
>> 1 - There is no associated support in SPL-2 for this (ie. Identify /
>> Discover). How does the attached entity know if the target device supports
>> this behavior or not?****
>>
>>  ****
>>
>> 2 –What happens to the link-state when the POWER DISABLE signal is
>> asserted?****
>>
>>  ****
>>
>> 3 – How does attached device know if the device has been hot-swapped with
>> a different device?****
>>
>>  ****
>>
>> 4 – What other system-level impacts does this have?****
>>
>>  ****
>>
>> Brad****
>>
>>  ****
>>
>> *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org] *On Behalf Of
*Felton,
>> Mickey
>> *Sent:* Thursday, August 16, 2012 3:39 PM
>> *To:* Alvin Cox; T10 Reflector
>> *Subject:* RE: Proposal posted: SAS-3 addition of POWER DISABLE****
>>
>>  ****
>>
>> Alvin- ****
>>
>> EMC agrees with the principal behind this proposal, but a few questions:*
>> ***
>>
>>  ****
>>
>> How long after stable 12V / 5V is the circuitry ready? Could it be
>> asserted while power is ramping up? ****
>>
>> Does the input signal on the drive have any special edge or level
>> requirements?****
>>
>>  ****
>>
>> Thanks!****
>>
>> -Mick****
>>
>>  ****
>>
>>  ****
>>
>>  ****
>>
>> *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org <owner-t10 at t10.org>]
>> *On Behalf Of *Alvin Cox
>> *Sent:* Thursday, August 16, 2012 12:33 PM
>> *To:* T10 Reflector
>> *Subject:* Proposal posted: SAS-3 addition of POWER DISABLE****
>>
>>  ****
>>
>> This proposal changes the functions of P1, P2, and P3 from 3.3V. The
>> signal assignment of these pins have been changed by other standards that
>> intermate with SAS connectors. Please review this proposal. The proposal
>> may be downloaded at:
>>   http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf
>>
>> This proposal was introduced on the 8/16/12 SAS PHY call and will be the
>> first discussion item on the 8/23/12 SAS PHY call.****
>>
>> *Abstract *****
>>
>> This proposal documents the changes associated with the addition of POWER
>> DISABLE to SAS-3. This function provides a means for the SAS target device
>> with a SAS Drive plug connector or SAS MultiLink Drive plug connector to
>> remove D.C. power (+5V and +12V) from the drive circuitry when the power
>> disable signal is driven high by the system. The POWER DISABLE signal is
>> specified on P3. If POWER DISABLE is not supported, P3 shall be not
>> connected. P1 and P2 are shorted together to provide the same connection
as
>> on SAS drives compliant with versions of the SAS standard previous to
>> SAS-3, and to be consistent with the recommended implementation specified
>> by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The
>> functional polarity of POWER DISABLE is consistent with DEVSLP if the
>> DEVSLP function is enabled.****
>>
>>  Extensive research was done prior to drafting this proposal with respect
>> to system implementation on P1, P2, and P3. No instances were found where
>> systems provided 3.3V power to these pins. Maintaining the connection of
P1
>> to P2 provided the widest support of legacy implementations that used the
>> pins for functionality not specified by the SAS standard.****
>>
>>
>>
>> --
>> Alvin Cox
>> Seagate Technology, LLC
>> Cell 405-206-4809
>> Office 405-392-3738
>> E-Mail  alvin.cox at seagate.com ****
>>
>> ** **
>>
>> CONFIDENTIALITY****
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are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or
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>> ** **
>>
>>
> CONFIDENTIALITY
> This e-mail message and any attachments thereto, is intended only for use
by the addressee(s) named herein and may contain legally privileged and/or
confidential information. If you are not the intended recipient of this
e-mail message, you are hereby notified that any dissemination, distribution
or copying of this e-mail message, and any attachments thereto, is strictly
prohibited.  If you have received this e-mail message in error, please
immediately notify the sender and permanently delete the original and any
copies of this email and any prints thereof.
> ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT
INTENDED AS A SUBSTITUTE FOR A WRITING.  Notwithstanding the Uniform
Electronic Transactions Act or the applicability of any other law of similar
substance and effect, absent an express statement to the contrary
hereinabove, this e-mail message its contents, and any attachments hereto are
not intended to represent an offer or acceptance to enter into a contract and
are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or
any of its subsidiaries), or any other person or entity.
>
>
>
-- 
Alvin Cox
Seagate Technology, LLC
Cell 405-206-4809
Office 405-392-3738
E-Mail	alvin.cox at seagate.com



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