From Elliott at hp.com Wed Aug 1 07:33:39 2012 From: Elliott at hp.com (Elliott, Robert (Server Storage)) Date: Wed, 1 Aug 2012 14:33:39 +0000 Subject: Discussion on 12-104 -- Synchronize Cache progress indicaction proposal Message-ID: Formatted message: HTML-formatted message I recommend using a mode page that is defined in SBC-n; don't litter SPC-n with more peripheral device type specific content. The Extended Device-Type Specific mode page (16h) was designed for this purpose. I would use these meanings: Command handling during synchronize cache operations 00b = don't terminate commands; don't provide progress indication (legacy mode) 01b = don't terminate media access commands (let them wait) provide pollable sense data with NO SENSE/SYNCHRONIZE CACHE IN PROGRESS (ASC=00h based) 10b = terminate media access commands with NOT READY/LOGICAL UNIT NOT READY, SYNCHRONIZE CACHE IN PROGRESS (ASC=04h based) 11b = reserved --- Rob Elliott HP Server Storage From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Gerry Houlder Sent: Tuesday, 31 July, 2012 3:46 PM To: T10 Reflector Subject: Discussion on 12-104 -- Synchronize Cache progress indicaction proposal Hi, Discussion of 12-104 rev. 3 (Add progress indication to SYNCHRONIZE CACHE commands) at the July CAP meeting suggested adding a two bit mode page field to control which response should be provided. The three choices are unsupported, supported with queuing commands, and supported with aborting commands. That discussion didn't recommend which mode page to use, however. I think the Control Extension mode page is the most obvious choice (there aren't any two bit fields available in the Control mode page unless we either make the page larger or break into an obsolete field). Does everyone agree with this choice? If you think a different mode page is more appropriate, please reply to this email. From gerry.houlder at seagate.com Wed Aug 1 13:27:51 2012 From: gerry.houlder at seagate.com (Gerry Houlder) Date: Wed, 1 Aug 2012 15:27:51 -0500 Subject: Aug. 21, 2:00pm CT Telecon announcement Message-ID: Formatted message: HTML-formatted message Hi, Seagate will be hosting a Telecon on Tuesday Aug. 21, starting at 2:00 pm and lasting for two hours. Agenda will be to cover new revisions of two proposals that have not gotten much CAP meeting time in the last few meetings: 12-104r4 Add progress indication for SYNCHRONIZE CACHE command 11-322r? Crash Dump New rev of each proposal is expected to be posted to T10 web site several days before the 8/21 telecon. ------------------------------------------------------- Meeting information ------------------------------------------------------- Topic: Proposals 12-104 and 11-322 Date: Tuesday, August 21, 2012 Time: 2:00 pm, Central Daylight Time (Chicago, GMT-05:00) Meeting Number: 821 649 069 Meeting Password: T10T10T10 ------------------------------------------------------- To start or join the online meeting ------------------------------------------------------- Go to https://seagate.webex.com/seagate/j.php?ED=170510387&UID=478887201&PW=NMDM1ZG JjOGJl&RT=MiM3 ------------------------------------------------------- To join the audio conference only ------------------------------------------------------- 1. Provide your number when you join the meeting to receive a call back. Alternatively, you can call one of the following numbers: SeaTel: 8-844-1000 United States: 1-952-230-1270 US Toll-Free: 1-855-856-8765 2. Follow the instructions that you hear on the phone. Your Cisco Unified MeetingPlace meeting ID: 821 649 069 From roweber at ieee.org Fri Aug 3 21:08:15 2012 From: roweber at ieee.org (Ralph Weber) Date: Fri, 03 Aug 2012 23:08:15 -0500 Subject: New SPC-4 Letter Ballot documents uploaded Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * Ralph Weber * A new SPC-4 Letter Ballot document set has been uploaded. As before, the right place to start is: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r2.pdf The new files will be the sources of conversation during the Monday (8/6) conference call: see: http://www.t10.org/cgi-bin/ac.pl?t=r&f=r1207241.htm Of particular note is the fact that one of the pollable sense data comments (HP-115) has been reopened based on the e-mail message reproduced below. This will be discussed Monday unless the SSC WG representation is zero. All the best, .Ralph ================= Hi Ralph, On further review of clause 5.1.2.2 (Selecting pollable sense data to return), I don't think item 2) sub item 4) is needed. The NOT READY sense key cases described in SSC-x would fall under item 1) sub item 2) and the NO SENSE sense key cases would fall under item 2) sub item 5) if sub item 4) was not present. That was the configuration I remember from the discussion at CAP. * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From lohmeyer at t10.org Sat Aug 4 23:02:22 2012 From: lohmeyer at t10.org (T10 Document Administrator) Date: Sun, 5 Aug 2012 00:02:22 -0600 Subject: Recent T10 documents uploaded since 2012/07/29 Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 Document Administrator * Proposals --------- Channel compliance points and lengths (by: Mickey Felton) T10/11-239r3 Uploaded: 2012/08/02 1077161 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=11-239r3.pdf SAS-3 Transmitter device compliance (by: Mathieu Gagnon) T10/12-242r6 Uploaded: 2012/07/31 90919 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-242r6.pdf SAS-3 TxRx connection compliance (by: Mathieu Gagnon) T10/12-243r6 Uploaded: 2012/07/31 238173 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-243r6.pdf SAS-3 Receiver device compliance (by: Mathieu Gagnon) T10/12-244r6 Uploaded: 2012/07/31 320726 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-244r6.pdf SSC-4: Informational Exceptions Control mode page (by: Curtis Ballard) T10/12-245r3 Uploaded: 2012/08/01 121695 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-245r3.pdf SAS PHY: End-to-End Compliance Methodology and Specification (by: Mathieu Gagnon) T10/12-293r4 Uploaded: 2012/08/02 383404 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-293r4.pdf SPC-4 Letter Ballot Comment Resolutions (by: Ralph Weber) T10/12-311r2 Uploaded: 2012/08/03 8287205 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r2.fdf SPC-4 Letter Ballot Comment Resolutions (by: Ralph Weber) T10/12-311r2 Uploaded: 2012/08/03 1723486 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r2.pdf SAS-3 Reference TxRx connection segments (by: Mathieu Gagnon) T10/12-312r3 Uploaded: 2012/07/31 174432 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-312r3.pdf SPL-3: SMP Open Priority (by: George Penokie) T10/12-316r1 Uploaded: 2012/07/30 72661 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-316r1.pdf Minutes of SAS Protocol Working Group - Jul 18, 2012 (by: Weber & Lohmeyer) T10/12-326r1 Uploaded: 2012/07/31 34099 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-326r1.htm Minutes of SAS Protocol Working Group - Jul 18, 2012 (by: Weber & Lohmeyer) T10/12-326r1 Uploaded: 2012/07/31 97637 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-326r1.pdf Letter Ballot on recommendation on DIS 14776-153 (SAS-2.1) (by: John Lohmeyer) T10/12-352r0 Uploaded: 2012/07/31 33784 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-352r0.pdf Letter Ballot on recommendation on DIS 17760-101 (ATA8-ACS) (by: John Lohmeyer) T10/12-354r0 Uploaded: 2012/07/31 33889 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-354r0.pdf Minutes of SAS PHY Working Group conference call August 2, 2012 (by: Alvin Cox) T10/12-356r0 Uploaded: 2012/08/02 26584 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-356r0.pdf Working Drafts -------------- SCSI Primary Commands - 4 (SPC-4) (Editor: Ralph Weber) Rev: 36d Uploaded: 2012/08/03 4323593 bytes http://www.t10.org/cgi-bin/ac.pl?t=f&f=spc4r36d.pdf (Report generated on 2012/08/05 at 00:02:22) * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From scsi.bbs at lsi.com Tue Aug 7 12:22:37 2012 From: scsi.bbs at lsi.com (T10 Voting Administrator) Date: Tue, 7 Aug 2012 13:22:37 -0600 Subject: SOP: T10 Letter Ballot T10LBVOTE 12-357r0 Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 Voting Administrator * 2012/08/07 13:20:50 A T10 letter ballot (T10/12-357r0) has just been issued. If you are a T10 voting member, you should have already received a separate email with details of how to vote. If you did not receive this separate email, it is likely that a spam filter blocked its delivery. You can also find voting instructions in the Members section of the T10 committee web site. The topic of this letter ballot is: Forwarding SOP to First Public Review This ballot closes 2012/09/07 at 12:00 noon MT. Please do NOT reply to this automated email. * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From alvin.cox at seagate.com Tue Aug 7 14:13:40 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Tue, 7 Aug 2012 16:13:40 -0500 Subject: Reminder: SAS PHY teleconference, Aug 9, 2012, 10:00am CDT Message-ID: Formatted message: HTML-formatted message Next call August 9 Agenda: General: What needs to be done to complete SAS-3 for letter ballot? Connector related New items? Electrical Channel compliance points and lengths (11-239r3 Formatted message: HTML-formatted message Dear September T10 Guests: Reminder we are obligated to have everyone booked by the end of this week Aug 10th for the hotel to start to release rooms for other types of bookings. It appears we have around 30 people who have already reserved, and took most if not all the King rooms at this point. There are Queen rooms available but they are handicap accessible if a bigger bed over double is required. Thank you for taking the time to do book this week. Look forward to seeing everyone in Boston in a few weeks. For new T10 guests please read the INCITS Chair's message on staying at the recommended hotel: http://www.t10.org/cgi-bin/ac.pl?t=d&f=09-341r0.pdf From lohmeyer at t10.org Sat Aug 11 23:01:27 2012 From: lohmeyer at t10.org (T10 Document Administrator) Date: Sun, 12 Aug 2012 00:01:27 -0600 Subject: Recent T10 documents uploaded since 2012/08/05 Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 Document Administrator * Proposals --------- Channel compliance points and lengths (by: Mickey Felton) T10/11-239r4 Uploaded: 2012/08/09 1083129 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=11-239r4.pdf SPC-4 SBC-3 Add progress indication description to SYNCHRONIZE CACHE commands (by: Gerald Houlder) T10/12-104r4 Uploaded: 2012/08/10 65229 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-104r4.pdf Results of Letter Ballot on recommendation on DIS 14776-153 (SAS-2.1) (by: John Lohmeyer) T10/12-353r0 Uploaded: 2012/08/07 5926 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-353r0.pdf Results of Letter Ballot on recommendation on DIS 14776-153 (SAS-2.1) (by: John Lohmeyer) T10/12-353r0 Uploaded: 2012/08/07 11652 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-353r0.txt Results of Letter Ballot on recommendation on DIS 17760-101 (ATA8-ACS) (by: John Lohmeyer) T10/12-355r0 Uploaded: 2012/08/07 3149 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-355r0.pdf Results of Letter Ballot on recommendation on DIS 17760-101 (ATA8-ACS) (by: John Lohmeyer) T10/12-355r0 Uploaded: 2012/08/07 4848 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-355r0.txt Letter Ballot on forwarding SOP to First Public Review (by: John Lohmeyer) T10/12-357r0 Uploaded: 2012/08/07 34521 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-357r0.pdf Minutes of SAS PHY Working Group conference call August 9, 2012 (by: Alvin Cox) T10/12-360r0 Uploaded: 2012/08/09 23165 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-360r0.pdf SAS-3 open items list (by: Alvin Cox) T10/12-361r0 Uploaded: 2012/08/09 58429 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-361r0.pdf SPC-5 Obsolete Printer Devices (by: Paul Suhler) T10/12-362r0 Uploaded: 2012/08/10 25296 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-362r0.pdf Working Drafts -------------- SCSI over PCIe(r) architecture (SOP) (Editor: Curtis Stevens) Rev: 04 Uploaded: 2012/08/07 2088036 bytes http://www.t10.org/cgi-bin/ac.pl?t=f&f=sop-r04.pdf (Report generated on 2012/08/12 at 00:01:27) * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From roweber at ieee.org Sun Aug 12 17:22:47 2012 From: roweber at ieee.org (Ralph Weber) Date: Sun, 12 Aug 2012 19:22:47 -0500 Subject: New rev posted for SAM-5 proposal to better organize LUNs Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * Ralph Weber * I have uploaded a new revision of the SAM-5 UML etc. changes that are intended to allow LUN value to be organized for easier processing and lower overhead (e.g., from unit attentions). http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-247r2.pdf The r2 posting is about as different from the r1 as r1 was |from r0, i.e., v-e-e-e-r-y different. Plan on a noticeable amount of need reading to be done. All the best, .Ralph * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From alvin.cox at seagate.com Tue Aug 14 21:37:01 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Tue, 14 Aug 2012 23:37:01 -0500 Subject: Reminder: SAS PHY teleconference, Aug 16, 2012, 10:00am CDT Message-ID: Formatted message: HTML-formatted message Next call August 16, 2012, 10:00 am CDT. Agenda: General SAS-3 items to resolve: a) Does the CT connection need AC coupling on the transmitter? b) Does the zero length test load need to be updated for 12Gbps. Connector related New items Electrical Channel compliance points and lengths (11-239r4 * From the T10 Reflector (t10 at t10.org), posted by: * Eric Agan * Hi, Should Mode Sense(6) and Mode Sense(10) return the appropriate Mode parameter header even if an unsupported Page or Subpage was requested? SPC-3 states: "An application client may request any one or all of the supported mode pages from the device server. If an application client issues a MODE SENSE command with a page code or subpage code value not implemented by the logical unit, the command shall be terminated with CHECK CONDITION status, with the sense key set to ILLEGAL REQUEST, and the additional sense code set to INVALID FIELD IN CDB." ...but doesn't seem to clarify whether the header should be returned anyway or not. What about other errors such as requesting Changeable Values when the logic unit doesn't implement them? SPC-3 dictates the same response as above for that scenario. My assumption has been to always return the header. Thanks, Eric Agan Elegant Invention * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From gerry.houlder at seagate.com Wed Aug 15 06:29:04 2012 From: gerry.houlder at seagate.com (Gerry Houlder) Date: Wed, 15 Aug 2012 08:29:04 -0500 Subject: When should Mode parameter header (not) be returned? Message-ID: Formatted message: HTML-formatted message When the target returns CHECK CONDITION status to complain about something illegal in the CDB, then no data is returned, only the status information. With SAS 9which has autosense feature) the sense data is returned as part of the status frame. On Wed, Aug 15, 2012 at 2:40 AM, Eric Agan wrote: > * From the T10 Reflector (t10 at t10.org), posted by: > * Eric Agan > * > Hi, > > Should Mode Sense(6) and Mode Sense(10) return the appropriate Mode > parameter header even if an unsupported Page or Subpage was requested? > SPC-3 states: > > "An application client may request any one or all of the supported > mode pages from the device server. If an application > client issues a MODE SENSE command with a page code or subpage code > value not implemented by the > logical unit, the command shall be terminated with CHECK CONDITION > status, with the sense key set to ILLEGAL > REQUEST, and the additional sense code set to INVALID FIELD IN CDB." > > ...but doesn't seem to clarify whether the header should be returned > anyway or not. > > What about other errors such as requesting Changeable Values when the > logic unit doesn't implement them? SPC-3 dictates the same response as > above for that scenario. > My assumption has been to always return the header. > > Thanks, > Eric Agan > Elegant Invention > * > * For T10 Reflector information, send a message with > * 'info t10' (no quotes) in the message body to majordomo at t10.org > From alvin.cox at seagate.com Thu Aug 16 09:32:49 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Thu, 16 Aug 2012 11:32:49 -0500 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message This proposal changes the functions of P1, P2, and P3 from 3.3V. The signal assignment of these pins have been changed by other standards that intermate with SAS connectors. Please review this proposal. The proposal may be downloaded at: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf This proposal was introduced on the 8/16/12 SAS PHY call and will be the first discussion item on the 8/23/12 SAS PHY call. *Abstract * This proposal documents the changes associated with the addition of POWER DISABLE to SAS-3. This function provides a means for the SAS target device with a SAS Drive plug connector or SAS MultiLink Drive plug connector to remove D.C. power (+5V and +12V) from the drive circuitry when the power disable signal is driven high by the system. The POWER DISABLE signal is specified on P3. If POWER DISABLE is not supported, P3 shall be not connected. P1 and P2 are shorted together to provide the same connection as on SAS drives compliant with versions of the SAS standard previous to SAS-3, and to be consistent with the recommended implementation specified by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The functional polarity of POWER DISABLE is consistent with DEVSLP if the DEVSLP function is enabled. Extensive research was done prior to drafting this proposal with respect to system implementation on P1, P2, and P3. No instances were found where systems provided 3.3V power to these pins. Maintaining the connection of P1 to P2 provided the widest support of legacy implementations that used the pins for functionality not specified by the SAS standard. -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com From mickey.felton at emc.com Thu Aug 16 14:39:01 2012 From: mickey.felton at emc.com (Felton, Mickey) Date: Thu, 16 Aug 2012 17:39:01 -0400 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message Alvin- EMC agrees with the principal behind this proposal, but a few questions: How long after stable 12V / 5V is the circuitry ready? Could it be asserted while power is ramping up? Does the input signal on the drive have any special edge or level requirements? Thanks! -Mick From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Alvin Cox Sent: Thursday, August 16, 2012 12:33 PM To: T10 Reflector Subject: Proposal posted: SAS-3 addition of POWER DISABLE This proposal changes the functions of P1, P2, and P3 from 3.3V. The signal assignment of these pins have been changed by other standards that intermate with SAS connectors. Please review this proposal. The proposal may be downloaded at: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf This proposal was introduced on the 8/16/12 SAS PHY call and will be the first discussion item on the 8/23/12 SAS PHY call. Abstract This proposal documents the changes associated with the addition of POWER DISABLE to SAS-3. This function provides a means for the SAS target device with a SAS Drive plug connector or SAS MultiLink Drive plug connector to remove D.C. power (+5V and +12V) from the drive circuitry when the power disable signal is driven high by the system. The POWER DISABLE signal is specified on P3. If POWER DISABLE is not supported, P3 shall be not connected. P1 and P2 are shorted together to provide the same connection as on SAS drives compliant with versions of the SAS standard previous to SAS-3, and to be consistent with the recommended implementation specified by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The functional polarity of POWER DISABLE is consistent with DEVSLP if the DEVSLP function is enabled. Extensive research was done prior to drafting this proposal with respect to system implementation on P1, P2, and P3. No instances were found where systems provided 3.3V power to these pins. Maintaining the connection of P1 to P2 provided the widest support of legacy implementations that used the pins for functionality not specified by the SAS standard. -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com From Chuck.Gibson at sandisk.com Thu Aug 16 15:16:10 2012 From: Chuck.Gibson at sandisk.com (Chuck Gibson) Date: Thu, 16 Aug 2012 22:16:10 +0000 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message Is there an external pull-down on the POWER DISABLE line, or does the SAS target device need to provide one? Table 69 specifies the maximum value for Asserted current (power disabled) as 5.0uA, which doesn't allow for much of a pull-down. What would be the behavior if a SAS target device supporting POWER DISABLE is plugged into a legacy backplane? Regards, Chuck Gibson SanDisk From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Alvin Cox Sent: Thursday, August 16, 2012 9:33 AM To: T10 Reflector Subject: Proposal posted: SAS-3 addition of POWER DISABLE This proposal changes the functions of P1, P2, and P3 from 3.3V. The signal assignment of these pins have been changed by other standards that intermate with SAS connectors. Please review this proposal. The proposal may be downloaded at: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf This proposal was introduced on the 8/16/12 SAS PHY call and will be the first discussion item on the 8/23/12 SAS PHY call. Abstract This proposal documents the changes associated with the addition of POWER DISABLE to SAS-3. This function provides a means for the SAS target device with a SAS Drive plug connector or SAS MultiLink Drive plug connector to remove D.C. power (+5V and +12V) from the drive circuitry when the power disable signal is driven high by the system. The POWER DISABLE signal is specified on P3. If POWER DISABLE is not supported, P3 shall be not connected. P1 and P2 are shorted together to provide the same connection as on SAS drives compliant with versions of the SAS standard previous to SAS-3, and to be consistent with the recommended implementation specified by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The functional polarity of POWER DISABLE is consistent with DEVSLP if the DEVSLP function is enabled. Extensive research was done prior to drafting this proposal with respect to system implementation on P1, P2, and P3. No instances were found where systems provided 3.3V power to these pins. Maintaining the connection of P1 to P2 provided the widest support of legacy implementations that used the pins for functionality not specified by the SAS standard. -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com ________________________________ PLEASE NOTE: The information contained in this electronic mail message is intended only for the use of the designated recipient(s) named above. If the reader of this message is not the intended recipient, you are hereby notified that you have received this message in error and that any review, dissemination, distribution, or copying of this message is strictly prohibited. If you have received this communication in error, please notify the sender by telephone or e-mail (as shown above) immediately and destroy any and all copies of this message in your possession (whether hard copies or electronically stored copies). From Brad.Besmer at lsi.com Thu Aug 16 15:16:53 2012 From: Brad.Besmer at lsi.com (Besmer, Brad) Date: Thu, 16 Aug 2012 16:16:53 -0600 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message Alvin, Few discussion items: 1 - There is no associated support in SPL-2 for this (ie. Identify / Discover). How does the attached entity know if the target device supports this behavior or not? 2 -What happens to the link-state when the POWER DISABLE signal is asserted? 3 - How does attached device know if the device has been hot-swapped with a different device? 4 - What other system-level impacts does this have? Brad From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Felton, Mickey Sent: Thursday, August 16, 2012 3:39 PM To: Alvin Cox; T10 Reflector Subject: RE: Proposal posted: SAS-3 addition of POWER DISABLE Alvin- EMC agrees with the principal behind this proposal, but a few questions: How long after stable 12V / 5V is the circuitry ready? Could it be asserted while power is ramping up? Does the input signal on the drive have any special edge or level requirements? Thanks! -Mick From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Alvin Cox Sent: Thursday, August 16, 2012 12:33 PM To: T10 Reflector Subject: Proposal posted: SAS-3 addition of POWER DISABLE This proposal changes the functions of P1, P2, and P3 from 3.3V. The signal assignment of these pins have been changed by other standards that intermate with SAS connectors. Please review this proposal. The proposal may be downloaded at: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf This proposal was introduced on the 8/16/12 SAS PHY call and will be the first discussion item on the 8/23/12 SAS PHY call. Abstract This proposal documents the changes associated with the addition of POWER DISABLE to SAS-3. This function provides a means for the SAS target device with a SAS Drive plug connector or SAS MultiLink Drive plug connector to remove D.C. power (+5V and +12V) from the drive circuitry when the power disable signal is driven high by the system. The POWER DISABLE signal is specified on P3. If POWER DISABLE is not supported, P3 shall be not connected. P1 and P2 are shorted together to provide the same connection as on SAS drives compliant with versions of the SAS standard previous to SAS-3, and to be consistent with the recommended implementation specified by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The functional polarity of POWER DISABLE is consistent with DEVSLP if the DEVSLP function is enabled. Extensive research was done prior to drafting this proposal with respect to system implementation on P1, P2, and P3. No instances were found where systems provided 3.3V power to these pins. Maintaining the connection of P1 to P2 provided the widest support of legacy implementations that used the pins for functionality not specified by the SAS standard. -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com From tc.mcnally at newisys.com Fri Aug 17 05:51:16 2012 From: tc.mcnally at newisys.com (T. C. McNally) Date: Fri, 17 Aug 2012 06:51:16 -0600 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message All, Is the pin choice for POWER DISABLE negotiable? I would ask for this function to be on P1. Thanks, T. C. Mc Nally System Engineer 719-884-8733 On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad wrote: > Alvin,**** > > ** ** > > Few discussion items:**** > > ** ** > > 1 - There is no associated support in SPL-2 for this (ie. Identify / > Discover). How does the attached entity know if the target device supports > this behavior or not?**** > > ** ** > > 2 ???What happens to the link-state when the POWER DISABLE signal is > asserted?**** > > ** ** > > 3 ??? How does attached device know if the device has been hot-swapped with > a different device?**** > > ** ** > > 4 ??? What other system-level impacts does this have?**** > > ** ** > > Brad**** > > ** ** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org] *On Behalf Of *Felton, > Mickey > *Sent:* Thursday, August 16, 2012 3:39 PM > *To:* Alvin Cox; T10 Reflector > *Subject:* RE: Proposal posted: SAS-3 addition of POWER DISABLE**** > > ** ** > > Alvin- **** > > EMC agrees with the principal behind this proposal, but a few questions:** > ** > > ** ** > > How long after stable 12V / 5V is the circuitry ready? Could it be > asserted while power is ramping up? **** > > Does the input signal on the drive have any special edge or level > requirements?**** > > ** ** > > Thanks!**** > > -Mick**** > > ** ** > > ** ** > > ** ** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org ] *On > Behalf Of *Alvin Cox > *Sent:* Thursday, August 16, 2012 12:33 PM > *To:* T10 Reflector > *Subject:* Proposal posted: SAS-3 addition of POWER DISABLE**** > > ** ** > > This proposal changes the functions of P1, P2, and P3 from 3.3V. The > signal assignment of these pins have been changed by other standards that > intermate with SAS connectors. Please review this proposal. The proposal > may be downloaded at: > http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf > > This proposal was introduced on the 8/16/12 SAS PHY call and will be the > first discussion item on the 8/23/12 SAS PHY call.**** > > *Abstract ***** > > This proposal documents the changes associated with the addition of POWER > DISABLE to SAS-3. This function provides a means for the SAS target device > with a SAS Drive plug connector or SAS MultiLink Drive plug connector to > remove D.C. power (+5V and +12V) from the drive circuitry when the power > disable signal is driven high by the system. The POWER DISABLE signal is > specified on P3. If POWER DISABLE is not supported, P3 shall be not > connected. P1 and P2 are shorted together to provide the same connection as > on SAS drives compliant with versions of the SAS standard previous to > SAS-3, and to be consistent with the recommended implementation specified > by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The > functional polarity of POWER DISABLE is consistent with DEVSLP if the > DEVSLP function is enabled.**** > > Extensive research was done prior to drafting this proposal with respect > to system implementation on P1, P2, and P3. No instances were found where > systems provided 3.3V power to these pins. Maintaining the connection of P1 > to P2 provided the widest support of legacy implementations that used the > pins for functionality not specified by the SAS standard.**** > > > > -- > Alvin Cox > Seagate Technology, LLC > Cell 405-206-4809 > Office 405-392-3738 > E-Mail alvin.cox at seagate.com **** > CONFIDENTIALITY This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof. ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity. From alvin.cox at seagate.com Fri Aug 17 07:48:03 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Fri, 17 Aug 2012 09:48:03 -0500 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message Answers are coming. i have compiled all of the responses so far and will provide responses. Very good questions. On Fri, Aug 17, 2012 at 9:44 AM, Felton, Mickey wrote: > Can you provide a reason?**** > > ** ** > > I believe the reasoning from Alvin on 3 was because 1 and 2 were always > connected together on ?other systems?..**** > > ** ** > > ** ** > > *From:* T. C. McNally [mailto:tc.mcnally at newisys.com] > *Sent:* Friday, August 17, 2012 8:51 AM > *To:* Besmer, Brad > *Cc:* Felton, Mickey; Alvin Cox; T10 Reflector > *Subject:* Re: Proposal posted: SAS-3 addition of POWER DISABLE**** > > ** ** > > All, > > Is the pin choice for POWER DISABLE negotiable? I would ask for this > function to be on P1. > > **** > > Thanks, > > T. C. Mc Nally > System Engineer > 719-884-8733**** > > > > **** > > On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad wrote: > **** > > Alvin,**** > > **** > > Few discussion items:**** > > **** > > 1 - There is no associated support in SPL-2 for this (ie. Identify / > Discover). How does the attached entity know if the target device supports > this behavior or not?**** > > **** > > 2 ?What happens to the link-state when the POWER DISABLE signal is > asserted?**** > > **** > > 3 ? How does attached device know if the device has been hot-swapped with > a different device?**** > > **** > > 4 ? What other system-level impacts does this have?**** > > **** > > Brad**** > > **** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org] *On Behalf Of *Felton, > Mickey > *Sent:* Thursday, August 16, 2012 3:39 PM > *To:* Alvin Cox; T10 Reflector > *Subject:* RE: Proposal posted: SAS-3 addition of POWER DISABLE**** > > **** > > Alvin- **** > > EMC agrees with the principal behind this proposal, but a few questions:** > ** > > **** > > How long after stable 12V / 5V is the circuitry ready? Could it be > asserted while power is ramping up? **** > > Does the input signal on the drive have any special edge or level > requirements?**** > > **** > > Thanks!**** > > -Mick**** > > **** > > **** > > **** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org ] *On > Behalf Of *Alvin Cox > *Sent:* Thursday, August 16, 2012 12:33 PM > *To:* T10 Reflector > *Subject:* Proposal posted: SAS-3 addition of POWER DISABLE**** > > **** > > This proposal changes the functions of P1, P2, and P3 from 3.3V. The > signal assignment of these pins have been changed by other standards that > intermate with SAS connectors. Please review this proposal. The proposal > may be downloaded at: > http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf > > This proposal was introduced on the 8/16/12 SAS PHY call and will be the > first discussion item on the 8/23/12 SAS PHY call.**** > > *Abstract ***** > > This proposal documents the changes associated with the addition of POWER > DISABLE to SAS-3. This function provides a means for the SAS target device > with a SAS Drive plug connector or SAS MultiLink Drive plug connector to > remove D.C. power (+5V and +12V) from the drive circuitry when the power > disable signal is driven high by the system. The POWER DISABLE signal is > specified on P3. If POWER DISABLE is not supported, P3 shall be not > connected. P1 and P2 are shorted together to provide the same connection as > on SAS drives compliant with versions of the SAS standard previous to > SAS-3, and to be consistent with the recommended implementation specified > by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The > functional polarity of POWER DISABLE is consistent with DEVSLP if the > DEVSLP function is enabled.**** > > Extensive research was done prior to drafting this proposal with respect > to system implementation on P1, P2, and P3. No instances were found where > systems provided 3.3V power to these pins. Maintaining the connection of P1 > to P2 provided the widest support of legacy implementations that used the > pins for functionality not specified by the SAS standard.**** > > > > -- > Alvin Cox > Seagate Technology, LLC > Cell 405-206-4809 > Office 405-392-3738 > E-Mail alvin.cox at seagate.com **** > > ** ** > > CONFIDENTIALITY**** > > This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof.**** > > ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity.**** > > ** ** > > -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com From tc.mcnally at newisys.com Fri Aug 17 07:52:34 2012 From: tc.mcnally at newisys.com (T. C. McNally) Date: Fri, 17 Aug 2012 08:52:34 -0600 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message The main reason is we, Newisys, currently use P1 for this function. Thanks, T. C. Mc Nally System Engineer 719-884-8733 On Fri, Aug 17, 2012 at 8:44 AM, Felton, Mickey wrote: > Can you provide a reason?**** > > ** ** > > I believe the reasoning from Alvin on 3 was because 1 and 2 were always > connected together on ???other systems???..**** > > ** ** > > ** ** > > *From:* T. C. McNally [mailto:tc.mcnally at newisys.com] > *Sent:* Friday, August 17, 2012 8:51 AM > *To:* Besmer, Brad > *Cc:* Felton, Mickey; Alvin Cox; T10 Reflector > *Subject:* Re: Proposal posted: SAS-3 addition of POWER DISABLE**** > > ** ** > > All, > > Is the pin choice for POWER DISABLE negotiable? I would ask for this > function to be on P1. > > **** > > Thanks, > > T. C. Mc Nally > System Engineer > 719-884-8733**** > > > > **** > > On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad wrote: > **** > > Alvin,**** > > **** > > Few discussion items:**** > > **** > > 1 - There is no associated support in SPL-2 for this (ie. Identify / > Discover). How does the attached entity know if the target device supports > this behavior or not?**** > > **** > > 2 ???What happens to the link-state when the POWER DISABLE signal is > asserted?**** > > **** > > 3 ??? How does attached device know if the device has been hot-swapped with > a different device?**** > > **** > > 4 ??? What other system-level impacts does this have?**** > > **** > > Brad**** > > **** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org] *On Behalf Of *Felton, > Mickey > *Sent:* Thursday, August 16, 2012 3:39 PM > *To:* Alvin Cox; T10 Reflector > *Subject:* RE: Proposal posted: SAS-3 addition of POWER DISABLE**** > > **** > > Alvin- **** > > EMC agrees with the principal behind this proposal, but a few questions:** > ** > > **** > > How long after stable 12V / 5V is the circuitry ready? Could it be > asserted while power is ramping up? **** > > Does the input signal on the drive have any special edge or level > requirements?**** > > **** > > Thanks!**** > > -Mick**** > > **** > > **** > > **** > > *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org ] *On > Behalf Of *Alvin Cox > *Sent:* Thursday, August 16, 2012 12:33 PM > *To:* T10 Reflector > *Subject:* Proposal posted: SAS-3 addition of POWER DISABLE**** > > **** > > This proposal changes the functions of P1, P2, and P3 from 3.3V. The > signal assignment of these pins have been changed by other standards that > intermate with SAS connectors. Please review this proposal. The proposal > may be downloaded at: > http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf > > This proposal was introduced on the 8/16/12 SAS PHY call and will be the > first discussion item on the 8/23/12 SAS PHY call.**** > > *Abstract ***** > > This proposal documents the changes associated with the addition of POWER > DISABLE to SAS-3. This function provides a means for the SAS target device > with a SAS Drive plug connector or SAS MultiLink Drive plug connector to > remove D.C. power (+5V and +12V) from the drive circuitry when the power > disable signal is driven high by the system. The POWER DISABLE signal is > specified on P3. If POWER DISABLE is not supported, P3 shall be not > connected. P1 and P2 are shorted together to provide the same connection as > on SAS drives compliant with versions of the SAS standard previous to > SAS-3, and to be consistent with the recommended implementation specified > by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The > functional polarity of POWER DISABLE is consistent with DEVSLP if the > DEVSLP function is enabled.**** > > Extensive research was done prior to drafting this proposal with respect > to system implementation on P1, P2, and P3. No instances were found where > systems provided 3.3V power to these pins. Maintaining the connection of P1 > to P2 provided the widest support of legacy implementations that used the > pins for functionality not specified by the SAS standard.**** > > > > -- > Alvin Cox > Seagate Technology, LLC > Cell 405-206-4809 > Office 405-392-3738 > E-Mail alvin.cox at seagate.com **** > > ** ** > > CONFIDENTIALITY**** > > This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof.**** > > ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity.**** > > ** ** > > CONFIDENTIALITY This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof. ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity. From mickey.felton at emc.com Fri Aug 17 07:44:00 2012 From: mickey.felton at emc.com (Felton, Mickey) Date: Fri, 17 Aug 2012 10:44:00 -0400 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message Can you provide a reason? I believe the reasoning from Alvin on 3 was because 1 and 2 were always connected together on ???other systems???.. From: T. C. McNally [mailto:tc.mcnally at newisys.com] Sent: Friday, August 17, 2012 8:51 AM To: Besmer, Brad Cc: Felton, Mickey; Alvin Cox; T10 Reflector Subject: Re: Proposal posted: SAS-3 addition of POWER DISABLE All, Is the pin choice for POWER DISABLE negotiable? I would ask for this function to be on P1. Thanks, T. C. Mc Nally System Engineer 719-884-8733 On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad wrote: Alvin, Few discussion items: 1 - There is no associated support in SPL-2 for this (ie. Identify / Discover). How does the attached entity know if the target device supports this behavior or not? 2 ???What happens to the link-state when the POWER DISABLE signal is asserted? 3 ??? How does attached device know if the device has been hot-swapped with a different device? 4 ??? What other system-level impacts does this have? Brad From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Felton, Mickey Sent: Thursday, August 16, 2012 3:39 PM To: Alvin Cox; T10 Reflector Subject: RE: Proposal posted: SAS-3 addition of POWER DISABLE Alvin- EMC agrees with the principal behind this proposal, but a few questions: How long after stable 12V / 5V is the circuitry ready? Could it be asserted while power is ramping up? Does the input signal on the drive have any special edge or level requirements? Thanks! -Mick From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of Alvin Cox Sent: Thursday, August 16, 2012 12:33 PM To: T10 Reflector Subject: Proposal posted: SAS-3 addition of POWER DISABLE This proposal changes the functions of P1, P2, and P3 from 3.3V. The signal assignment of these pins have been changed by other standards that intermate with SAS connectors. Please review this proposal. The proposal may be downloaded at: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf This proposal was introduced on the 8/16/12 SAS PHY call and will be the first discussion item on the 8/23/12 SAS PHY call. Abstract This proposal documents the changes associated with the addition of POWER DISABLE to SAS-3. This function provides a means for the SAS target device with a SAS Drive plug connector or SAS MultiLink Drive plug connector to remove D.C. power (+5V and +12V) from the drive circuitry when the power disable signal is driven high by the system. The POWER DISABLE signal is specified on P3. If POWER DISABLE is not supported, P3 shall be not connected. P1 and P2 are shorted together to provide the same connection as on SAS drives compliant with versions of the SAS standard previous to SAS-3, and to be consistent with the recommended implementation specified by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The functional polarity of POWER DISABLE is consistent with DEVSLP if the DEVSLP function is enabled. Extensive research was done prior to drafting this proposal with respect to system implementation on P1, P2, and P3. No instances were found where systems provided 3.3V power to these pins. Maintaining the connection of P1 to P2 provided the widest support of legacy implementations that used the pins for functionality not specified by the SAS standard. -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com CONFIDENTIALITY This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof. ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity. From gerry.houlder at seagate.com Fri Aug 17 12:55:59 2012 From: gerry.houlder at seagate.com (Gerry Houlder) Date: Fri, 17 Aug 2012 14:55:59 -0500 Subject: 12-104 rev. 4 has been posted Message-ID: Formatted message: HTML-formatted message 12-104r4 (Add progress indication definition for SYNCHRONIZE CACHE command) has been posted. This proposal will be discussed during the T10 telecon scheduled for Aug. 21, 2:00 pm CDT. Telecon details are available on the T10.org web site. That telecon is also scheduled to discuss a new revision of the crash dump proposal (not yet posted). From alvin.cox at seagate.com Fri Aug 17 14:41:42 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Fri, 17 Aug 2012 16:41:42 -0500 Subject: Proposal posted: SAS-3 addition of POWER DISABLE Message-ID: Formatted message: HTML-formatted message *T10 P3 repurposing questions and answers:* 1. Felton, Mickey mickey.felton at emc.com Q: How long after stable 12V / 5V is the circuitry ready? A: This is target device implementation specific. If the signal was asserted when power is applied, the target device would not power up. Q: Could it be asserted while power is ramping up? A: Yes. Q: Does the input signal on the drive have any special edge or level requirements? A: Level requirements are defined in the table. Target devices should implement some sort of hysteresis. 2. Chuck Gibson Chuck.Gibson at sandisk.com Q: Is there an external pull-down on the POWER DISABLE line, or does the SAS target device need to provide one? A: The SAS target device needs to provide one if required. Q: Table 69 specifies the maximum value for Asserted current (power disabled) as 5.0 ?A, which doesn?t allow for much of a pull-down. A: The purpose was to minimize the load on the system. This value is negotiable. One consideration is to maintain compatibility with the requirements for SATA DEVSLP, which has a 10.0 ?A maximum. Q: What would be the behavior if a SAS target device supporting POWER DISABLE is plugged into a legacy backplane? A: Normal operation unless the legacy backplane provides 3.3V on P3. If 3.3V is provided by the system on P3, the target device will not power up. 3. Besmer, Brad Brad.Besmer at lsi.com Q: There is no associated support in SPL-2 for this (ie. Identify / Discover). How does the attached entity know if the target device supports this behavior or not? A: TBD. We want to get approval of the repurposing prior to determining the best means of support notification. Q: What happens to the link-state when the POWER DISABLE signal is asserted? A: The device completely shuts down since the result is the same as turning off D.C. power to the device. Q: How does attached device know if the device has been hot-swapped with a different device? A: Please clarify what type of device. The target device performs a power on reset function when the POWER DISABLE signal is negated. Full initialization is performed as if a new device is present. Q: What other system-level impacts does this have? A: It allows the system to control the D.C. power at a target device. Of particular benefit is a case where communication to a target device is hung and a POR is required to re-establish the connection. Instead of physically removing the device from a system that does not have independent power control at each device slot, the signal may be asserted, then disabled to provide the same function as removing and reinserting the device or independently removing and enabling D.C. power to that individual device location. 4. T. C. McNally via sanmina-sci.com Q: Is the pin choice for POWER DISABLE negotiable? I would ask for this function to be on P1. A: P3 is consistent with changes made by SATA-IO. There are a significant number of extent systems that require shorting of P1 to P2. We do not see changing to P1 as a viable option. On Fri, Aug 17, 2012 at 9:52 AM, T. C. McNally wrote: > The main reason is we, Newisys, currently use P1 for this function. > > Thanks, > > T. C. Mc Nally > System Engineer > 719-884-8733 > > > > On Fri, Aug 17, 2012 at 8:44 AM, Felton, Mickey wrote: > >> Can you provide a reason?**** >> >> ** ** >> >> I believe the reasoning from Alvin on 3 was because 1 and 2 were always >> connected together on ?other systems?..**** >> >> ** ** >> >> ** ** >> >> *From:* T. C. McNally [mailto:tc.mcnally at newisys.com] >> *Sent:* Friday, August 17, 2012 8:51 AM >> *To:* Besmer, Brad >> *Cc:* Felton, Mickey; Alvin Cox; T10 Reflector >> *Subject:* Re: Proposal posted: SAS-3 addition of POWER DISABLE**** >> >> ** ** >> >> All, >> >> Is the pin choice for POWER DISABLE negotiable? I would ask for this >> function to be on P1. >> >> **** >> >> Thanks, >> >> T. C. Mc Nally >> System Engineer >> 719-884-8733**** >> >> >> >> **** >> >> On Thu, Aug 16, 2012 at 4:16 PM, Besmer, Brad >> wrote:**** >> >> Alvin,**** >> >> **** >> >> Few discussion items:**** >> >> **** >> >> 1 - There is no associated support in SPL-2 for this (ie. Identify / >> Discover). How does the attached entity know if the target device supports >> this behavior or not?**** >> >> **** >> >> 2 ?What happens to the link-state when the POWER DISABLE signal is >> asserted?**** >> >> **** >> >> 3 ? How does attached device know if the device has been hot-swapped with >> a different device?**** >> >> **** >> >> 4 ? What other system-level impacts does this have?**** >> >> **** >> >> Brad**** >> >> **** >> >> *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org] *On Behalf Of *Felton, >> Mickey >> *Sent:* Thursday, August 16, 2012 3:39 PM >> *To:* Alvin Cox; T10 Reflector >> *Subject:* RE: Proposal posted: SAS-3 addition of POWER DISABLE**** >> >> **** >> >> Alvin- **** >> >> EMC agrees with the principal behind this proposal, but a few questions:* >> *** >> >> **** >> >> How long after stable 12V / 5V is the circuitry ready? Could it be >> asserted while power is ramping up? **** >> >> Does the input signal on the drive have any special edge or level >> requirements?**** >> >> **** >> >> Thanks!**** >> >> -Mick**** >> >> **** >> >> **** >> >> **** >> >> *From:* owner-t10 at t10.org [mailto:owner-t10 at t10.org ] >> *On Behalf Of *Alvin Cox >> *Sent:* Thursday, August 16, 2012 12:33 PM >> *To:* T10 Reflector >> *Subject:* Proposal posted: SAS-3 addition of POWER DISABLE**** >> >> **** >> >> This proposal changes the functions of P1, P2, and P3 from 3.3V. The >> signal assignment of these pins have been changed by other standards that >> intermate with SAS connectors. Please review this proposal. The proposal >> may be downloaded at: >> http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf >> >> This proposal was introduced on the 8/16/12 SAS PHY call and will be the >> first discussion item on the 8/23/12 SAS PHY call.**** >> >> *Abstract ***** >> >> This proposal documents the changes associated with the addition of POWER >> DISABLE to SAS-3. This function provides a means for the SAS target device >> with a SAS Drive plug connector or SAS MultiLink Drive plug connector to >> remove D.C. power (+5V and +12V) from the drive circuitry when the power >> disable signal is driven high by the system. The POWER DISABLE signal is >> specified on P3. If POWER DISABLE is not supported, P3 shall be not >> connected. P1 and P2 are shorted together to provide the same connection as >> on SAS drives compliant with versions of the SAS standard previous to >> SAS-3, and to be consistent with the recommended implementation specified >> by SATA since P1 and P2 have been retired and P3 may implement DEVSLP. The >> functional polarity of POWER DISABLE is consistent with DEVSLP if the >> DEVSLP function is enabled.**** >> >> Extensive research was done prior to drafting this proposal with respect >> to system implementation on P1, P2, and P3. No instances were found where >> systems provided 3.3V power to these pins. Maintaining the connection of P1 >> to P2 provided the widest support of legacy implementations that used the >> pins for functionality not specified by the SAS standard.**** >> >> >> >> -- >> Alvin Cox >> Seagate Technology, LLC >> Cell 405-206-4809 >> Office 405-392-3738 >> E-Mail alvin.cox at seagate.com **** >> >> ** ** >> >> CONFIDENTIALITY**** >> >> This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof.**** >> >> ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity.**** >> >> ** ** >> >> > CONFIDENTIALITY > This e-mail message and any attachments thereto, is intended only for use by the addressee(s) named herein and may contain legally privileged and/or confidential information. If you are not the intended recipient of this e-mail message, you are hereby notified that any dissemination, distribution or copying of this e-mail message, and any attachments thereto, is strictly prohibited. If you have received this e-mail message in error, please immediately notify the sender and permanently delete the original and any copies of this email and any prints thereof. > ABSENT AN EXPRESS STATEMENT TO THE CONTRARY HEREINABOVE, THIS E-MAIL IS NOT INTENDED AS A SUBSTITUTE FOR A WRITING. Notwithstanding the Uniform Electronic Transactions Act or the applicability of any other law of similar substance and effect, absent an express statement to the contrary hereinabove, this e-mail message its contents, and any attachments hereto are not intended to represent an offer or acceptance to enter into a contract and are not otherwise intended to bind the sender, Sanmina-SCI Corporation (or any of its subsidiaries), or any other person or entity. > > > -- Alvin Cox Seagate Technology, LLC Cell 405-206-4809 Office 405-392-3738 E-Mail alvin.cox at seagate.com From lohmeyer at t10.org Sat Aug 18 23:01:32 2012 From: lohmeyer at t10.org (T10 Document Administrator) Date: Sun, 19 Aug 2012 00:01:32 -0600 Subject: Recent T10 documents uploaded since 2012/08/12 Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 Document Administrator * Proposals --------- SBC-3: Definitions for read, write, verify, and unmap operations (by: Mark Evans) T10/12-139r3 Uploaded: 2012/08/16 127038 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-139r3.pdf Logical Unit Groups (aka Conglomerates) in SAM-5 and SPC-5 (by: Ralph Weber) T10/12-247r2 Uploaded: 2012/08/12 98648 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-247r2.pdf SAS-3 addition of POWER DISABLE (by: Alvin Cox) T10/12-363r0 Uploaded: 2012/08/16 788298 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-363r0.pdf SAS-3 transmitter device A.C. coupling requirements for CT (by: Alvin Cox) T10/12-365r0 Uploaded: 2012/08/17 33119 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-365r0.pdf Working Drafts -------------- (Report generated on 2012/08/19 at 00:01:32) * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From gerry.houlder at seagate.com Tue Aug 21 06:23:21 2012 From: gerry.houlder at seagate.com (Gerry Houlder) Date: Tue, 21 Aug 2012 08:23:21 -0500 Subject: Reminder: Telecon Tues. Aug. 21 at 2:00 pm CDT Message-ID: Formatted message: HTML-formatted message The agenda for this telecon is to discuss (a) 12-104r4 -- Adding progress indication to SYNCHRONIZE CACHE command (b) 11-322 latest rev. -- Crash dump for SCSI Meeting scheduled to end at 4:00 pm CDT ------------------------------------------------------- Meeting information ------------------------------------------------------- Topic: Proposals 12-104 and 11-322 Date: Tuesday, August 21, 2012 Time: 2:00 pm, Central Daylight Time (Chicago, GMT-05:00) Meeting Number: 821 649 069 Meeting Password: T10T10T10 ------------------------------------------------------- To start or join the online meeting ------------------------------------------------------- Go to https://seagate.webex.com/seagate/j.php?ED=170510387&UID=478887201&PW=NMDM1ZG JjOGJl&RT=MiM3 ------------------------------------------------------- To join the audio conference only ------------------------------------------------------- 1. Provide your number when you join the meeting to receive a call back. Alternatively, you can call one of the following numbers: United States: 1-952-230-1270 US Toll-Free: 1-855-856-8765 2. Follow the instructions that you hear on the phone. Your Cisco Unified MeetingPlace meeting ID: 821 649 069 ------------------------------------------------------------ --------------------------- Are you a Seagate employee and need help? Visit the Seagate Web and Audio Conferencing Resource Center ------------------------------------------------------------ --------------------------- Go to: http://gcs.gm.seagate.com/sites.php?sitename=web-and-audio-conferencing-resou rce-center/ ------------------------------------------------------- For general WebEx assistance ------------------------------------------------------- 1. Go to https://seagate.webex.com/seagate/mc 2. On the left navigation bar, click "Support". To add this meeting to your calendar program (for example Microsoft Outlook), click this link: https://seagate.webex.com/seagate/j.php?ED=170510387&UID=478887201&ICS=MS&LD= 1&RD=2&ST=1&SHA2=aaRwsivha2RTMX/mamSHw5guq3DCFZ2lBMzKLYifQhY= From gerry.houlder at seagate.com Tue Aug 21 13:40:11 2012 From: gerry.houlder at seagate.com (Gerry Houlder) Date: Tue, 21 Aug 2012 15:40:11 -0500 Subject: Minutes of Aug. 21 telecon Message-ID: Formatted message: HTML-formatted message A telecon and webex was held on Aug. 21, starting at 2:00 pm CDT. The agenda was to discuss: (a) 12-104 rev. 4 -- Adding progress indication to SYNCHRONIZE CACHE command; and (b) 11-322 rev. 2 -- Crash Dump Attendees: Curtis Ballard (HP) George Penokie (LSI) Fred Knight (NetApp) Gerry Houlder (Seagate) Jim Hatfield (Seagate)) 12-104 rev 4 was reviewed. These changes were suggested: (a) use Caching mode page as location for the two bit control field for this feature; (b) change acronym for the field to SYNC_PROG because the current acronym was almost like an existing acronym; (c) other minor word changes. A new revision will be available for review at the CAP meeting in September. 11-322r2 was reviewed. Changes were made to align with latest revision of the associated T13 feature. The group identified the need for wording changes in the description of the crash dump parameter data. A new revision is expected for review at the CAP meeting in September. The telecon adjourned at 3:27 pm CDT. From alvin.cox at seagate.com Wed Aug 22 10:09:47 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Wed, 22 Aug 2012 12:09:47 -0500 Subject: Reminder: SAS PHY teleconference Thursday August 23, 2012, 10:00 am CDT Message-ID: Formatted message: HTML-formatted message Next call: August 23, 2012, 10:00 am CDT Agenda: SAS-3 addition of POWER DISABLE (12-363r0 Formatted message: HTML-formatted message Barry- In table 5-9 of the SFF 8449 specification it calls out a MINIMUM operating voltage WITHOUT a tolerance, or a tolerance built into the minimum. I was wondering if we all implied a nominal operating voltage instead in this table and we need a tolerance, or do we need to adjust the numbers in the table to add a tolerance? Or other such adjustment? Thanks.. -Mick From Barry.Olawsky at hp.com Thu Aug 23 03:43:26 2012 From: Barry.Olawsky at hp.com (Olawsky, Barry) Date: Thu, 23 Aug 2012 10:43:26 +0000 Subject: SFF8449. Message-ID: Formatted message: HTML-formatted message I would prefer that minimum and maximum values have no tolerance and be absolute. I'm OK with specifying nominal values in addition to the limits. From: Felton, Mickey [mailto:mickey.felton at emc.com] Sent: Wednesday, August 22, 2012 5:01 PM To: T10 Reflector Cc: Olawsky, Barry; Felton, Mickey Subject: SFF8449. Barry- In table 5-9 of the SFF 8449 specification it calls out a MINIMUM operating voltage WITHOUT a tolerance, or a tolerance built into the minimum. I was wondering if we all implied a nominal operating voltage instead in this table and we need a tolerance, or do we need to adjust the numbers in the table to add a tolerance? Or other such adjustment? Thanks.. -Mick From hcurley at indra.com Fri Aug 24 06:17:02 2012 From: hcurley at indra.com (Hugh Curley) Date: Fri, 24 Aug 2012 06:17:02 -0700 Subject: SFF8449. Message-ID: Formatted message: HTML-formatted message Hello Barry, The word MINIMUM cannot have a tolerance. For example if we have MINIMUM voltage = 2 volts plus or minus 10 percent, the MINIMUM is really 1.8 volts. The same is true of MAXIMUM. Thank you, Hugh Curley On 8/22/2012 2:01 PM, Felton, Mickey wrote: > > Barry- > > In table 5-9 of the SFF 8449 specification it calls out a MINIMUM > operating voltage WITHOUT a tolerance, or a tolerance built into the > minimum. > > I was wondering if we all implied a nominal operating voltage instead > in this table and we need a tolerance, or do we need to adjust the > numbers in the table to add a tolerance? Or other such adjustment? > > Thanks.. > > -Mick > From mickey.felton at emc.com Fri Aug 24 06:34:42 2012 From: mickey.felton at emc.com (Felton, Mickey) Date: Fri, 24 Aug 2012 09:34:42 -0400 Subject: SFF8449. Message-ID: Formatted message: HTML-formatted message Please take a look at Table 6 Page 22 in the SFF 8436, where it gives tolerances, we either need to add that couple line table in SFF8449 or change the numbers to the minimum 1.8-5%, 2.5-5%, 3.3-5% in table 5-9.. From: Hugh Curley [mailto:hcurley at indra.com] Sent: Friday, August 24, 2012 9:17 AM To: Felton, Mickey Cc: T10 Reflector; Olawsky, Barry Subject: Re: SFF8449. Hello Barry, The word MINIMUM cannot have a tolerance. For example if we have MINIMUM voltage = 2 volts plus or minus 10 percent, the MINIMUM is really 1.8 volts. The same is true of MAXIMUM. Thank you, Hugh Curley On 8/22/2012 2:01 PM, Felton, Mickey wrote: Barry- In table 5-9 of the SFF 8449 specification it calls out a MINIMUM operating voltage WITHOUT a tolerance, or a tolerance built into the minimum. I was wondering if we all implied a nominal operating voltage instead in this table and we need a tolerance, or do we need to adjust the numbers in the table to add a tolerance? Or other such adjustment? Thanks.. -Mick From WHubis at fusionio.com Fri Aug 24 12:30:03 2012 From: WHubis at fusionio.com (Walter Hubis) Date: Fri, 24 Aug 2012 13:30:03 -0600 Subject: Minutes of August 10 Teleconference Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * Walter Hubis * At 10:00PST on August 10, 2012, Fusion-io hosted a T10 conference call to present document 12-332r0, "Non-Volatile Memory Based Storage". The goal of the call was to establish the best ways to incorporate the new features and functionality that NVM combined with PCIe into the existing T10 SCSI specifications. The key points: - The meeting lasted an hour with around 40 participants. - Walt Hubis (Fusion-io) presented 12-332-r0. - There was a great deal of discussion about the proposal and how to move forward - about half of the meeting. - There was no support for a new SCSI device type. - The almost unanimous consensus was that a combination of modifications to existing commands along with some new commands would be the right way to proceed. - The difficulty with the banded drive proposal was single out an example of why a new class would not be a good way to proceed. - Concerns were voiced that a new device type will break a lot of SCSI driver stacks. - The next step is for Fusion-io to prepare a proposal that describes how we propose to implement the primitives in the existing specifications. (1) Use WRITE SAME to implement Persistent TRIM. (2) Recommendation to refer to PERSISTENT TRIM as DETERMINISTIC TRIM. (3) Add a new type of provisioning to accommodate these needs. (4) Prepare a presentation detailing Scattered Atomic Writes use case, where not all of the segments are atomic. - It was recommended that this be presented to T13 (ATA), as there will be side effects in the SCSI/ATA Translation layer (SAT). Attendance ---------- Mr. HengLiang Zhang Futurewei Technologies Inc Mr. Roy Clark EMC Corporation Mr. Paul Suhler Quantum Corporation Mr. Don Harwood OCZ Technology Group Inc Mr. Chris Fore NetApp Dr. Peter Onufryk Integrated Device Technology (IDT) Mr. Dan Colegrove HGST Mr. Jim Hatfield Seagate Technology Mr. Gerald Houlder Seagate Technology Mr. Stephen Finch Western Digital Corporation Mr. John Geldman Lexar Media Inc Mr. John Merrill Intel Corporation Mr. David Black EMC Corprotation Mr. Frederick Knight NetApp Mr. Walt Hubis Fusion-io Corporation -Walt --- Walt Hubis Storage Standards Architect Fusion-io Phone: (+1) 303.641.8528 Email: whubis at fusionio.com This e-mail (and any attachments) is confidential and may be privileged. Any unauthorized use, copying, disclosure or dissemination of this communication is prohibited. If you are not the intended recipient, please notify the sender immediately and delete all copies of the message and its attachments. * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From roweber at ieee.org Fri Aug 24 20:41:15 2012 From: roweber at ieee.org (Ralph Weber) Date: Fri, 24 Aug 2012 22:41:15 -0500 Subject: Updated SPC-4 Letter Ballot files Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * Ralph Weber * New SPC-4 letter ballot files, specifically 12-311r3 and SPC-4r36e, are now available. They reflect recently received late comments, the decisions reached during the 6 August call, and a randomly selected collection of comment resolutions made at the editor's discretion. The files are: http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r3.pdf http://www.t10.org/cgi-bin/ac.pl?t=f&f=spc4r36e.pdf As before, the instructions on page 1 of 12-311r3 are invaluable (unless you have already memorized them). All the best, .Ralph * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From Paul.Suhler at quantum.com Sat Aug 25 06:10:54 2012 From: Paul.Suhler at quantum.com (Paul Suhler) Date: Sat, 25 Aug 2012 13:10:54 +0000 Subject: Obsolete OCRW Devices in SPC-5? Message-ID: Formatted message: HTML-formatted message Attachment #1: image001.gif Hi, everyone. Optical Card Reader/Writer (OCRW) devices apparently first appeared in SPC-2. Are these still produced? If not, then should they be obsoleted in SPC-5? I have a proposal to obsolete printer devices (T10/12-362r0 * From the T10 Reflector (t10 at t10.org), posted by: * Ralph Weber * The standard that defines OCRW devices is still available for purchase |from ISO/IEC. ISO/IEC 14776-381:2000 Information technology -- Small Computer System Interface (SCSI) -- Part 381: Optical Memory Card Device Commands (OMC) This recommends strongly against making them obsolete without first consulting the ISO/IEC home office. All the best, .Ralph On 8/25/2012 8:10 AM, Paul Suhler wrote: > > Hi, everyone. > > Optical Card Reader/Writer (OCRW) devices apparently first appeared in > SPC-2. Are these still produced? If not, then should they be > obsoleted in SPC-5? I have a proposal to obsolete printer devices > (T10/12-362r0 so this could be added. > > Thanks, > > Paul > > *____________________________________________________________________________ _________________________* > > Paul A. Suhler, PhD| Firmware Engineer | Quantum Corporation| Office: > 949.856.7748 | paul.suhler at quantum.com > > be-certain_lockup.gif * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From lohmeyer at t10.org Sat Aug 25 23:01:52 2012 From: lohmeyer at t10.org (T10 Document Administrator) Date: Sun, 26 Aug 2012 00:01:52 -0600 Subject: Recent T10 documents uploaded since 2012/08/19 Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 Document Administrator * Proposals --------- SBC-4 SPC-5 Atomic writes and reads (by: Rob Elliott and Ashish Batwara) T10/11-229r6 Uploaded: 2012/08/24 282885 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=11-229r6.pdf SPL-3 Persistent Connection (by: George Penokie) T10/12-251r4 Uploaded: 2012/08/22 608104 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-251r4.pdf SBC-3 Migrate from the FORMAT UNIT command SI bit to SANITIZE (by: Rob Elliott) T10/12-274r1 Uploaded: 2012/08/22 122646 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-274r1.pdf SBC-3 Allow verify operations on unmapped LBAs (by: Rob Elliott) T10/12-282r1 Uploaded: 2012/08/23 263663 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-282r1.pdf SPC-4 Letter Ballot Comment Resolutions (by: Ralph Weber) T10/12-311r3 Uploaded: 2012/08/24 8419559 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r3.fdf SPC-4 Letter Ballot Comment Resolutions (by: Ralph Weber) T10/12-311r3 Uploaded: 2012/08/24 1867854 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-311r3.pdf Minutes of T10 Plenary Meeting #110 - Jul 19, 2012 (by: Weber & Lohmeyer) T10/12-327r0 Uploaded: 2012/08/24 143347 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-327r0.htm Minutes of T10 Plenary Meeting #110 - Jul 19, 2012 (by: Weber & Lohmeyer) T10/12-327r0 Uploaded: 2012/08/24 297972 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-327r0.pdf SPC-4 MODE SENSE (6) with more than 256 bytes of data (by: Rob Elliott) T10/12-333r1 Uploaded: 2012/08/22 150984 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-333r1.pdf SAM-5 Move multiple port model from SPC-4 (by: Rob Elliott) T10/12-335r0 Uploaded: 2012/08/22 164606 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-335r0.pdf Agenda for T10 Meeting #111 September 13, 2012 (by: John Lohmeyer) T10/12-344r1 Uploaded: 2012/08/24 15221 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-344r1.pdf Minutes of SAS PHY Working Group conference call August 16, 2012 (by: Alvin Cox) T10/12-364r0 Uploaded: 2012/08/22 24549 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-364r0.pdf PQI Cleanup Coalescing Trigger (by: Brad Besmer) T10/12-366r0 Uploaded: 2012/08/20 152336 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-366r0.pdf Project Proposal: SBC-4 (SCSI Block Commands - 4) (by: Mark Evans) T10/12-367r0 Uploaded: 2012/08/21 21177 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-367r0.pdf SBC-3 GET LBA STATUS and related clarifications (by: Rob Elliott) T10/12-368r0 Uploaded: 2012/08/21 200172 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-368r0.pdf SBC-4 Yet another DIF type (by: Rob Elliott) T10/12-369r0 Uploaded: 2012/08/24 307293 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-369r0.pdf Molex Patent Statement re SAS-3 (by: Stephen L. Sheldon) T10/12-370r0 Uploaded: 2012/08/24 291224 bytes http://www.t10.org/cgi-bin/ac.pl?t=d&f=12-370r0.pdf Working Drafts -------------- SCSI Primary Commands - 4 (SPC-4) (Editor: Ralph Weber) Rev: 36e Uploaded: 2012/08/24 4331732 bytes http://www.t10.org/cgi-bin/ac.pl?t=f&f=spc4r36e.pdf (Report generated on 2012/08/26 at 00:01:52) * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From lohmeyer at t10.org Tue Aug 28 01:00:00 2012 From: lohmeyer at t10.org (T10 List Manager) Date: Tue, 28 Aug 2012 02:00:00 -0600 Subject: T10 Reflector Monthly Reminder Message-ID: * From the T10 Reflector (t10 at t10.org), posted by: * T10 List Manager * This is an automatic monthly posting to the T10 Reflector. If you receive this message, it means that you are subscribed to the T10 Reflector email list. The T10 Reflector is provided by the SCSI Trade Association and maintained by LSI Corp. This reflector exists to discuss INCITS T10 Technical Committee issues and to disseminate T10-related information (minutes, meeting notices, etc.). --------------------------------------------------------------------------- You do not need to be an INCITS T10 Technical Committee member to use this reflector, however you must agree to: * read the INCITS Patent Policy and the INCITS Antitrust Guidelines * acknowledge that the activities of the T10 Technical Committee are governed by the INCITS policies and procedures as specified in the reference documents RD-1 and RD-2 * acknowledge that draft documents may change at any time, without notice. The INCITS Patent Policy, the INCITS Antitrust Guidelines, the RD-1, and the RD-2 are all available on the www.incits.org web site. If you do not agree to the above conditions, then you must unsubscribe to this reflector. --------------------------------------------------------------------------- T10 Reflector is not intended to carry commercial traffic. People who post advertisements, job offers, etc. will be removed from the reflector. Please visit http://www.t10.org/t10r.htm for instructions on subscribing, unsubscribing, or searching the T10 Reflector archives. * * For T10 Reflector information, send a message with * 'info t10' (no quotes) in the message body to majordomo at t10.org From alvin.cox at seagate.com Wed Aug 29 13:59:50 2012 From: alvin.cox at seagate.com (Alvin Cox) Date: Wed, 29 Aug 2012 15:59:50 -0500 Subject: Reminder: SAS PHY teleconference Thursday August 30, 2012, 10:00 am CDT Message-ID: Formatted message: HTML-formatted message Next call: August 30, 2012, 10:00 am CDT Agenda: SAS-3 addition of POWER DISABLE (12-363r1