[MtFuji] Consulting Item from SATA-IO: [Digital] Minutes from 1/25/2010

Newman, Harvey Harvey.Newman at lsi.com
Wed Feb 10 07:12:10 PST 2010


* From the T10 Reflector (t10 at t10.org), posted by:
* "Newman, Harvey" <Harvey.Newman at lsi.com>
*
Hi Keiji,
This discussion needs to change to the appropriate forum.  It is a SATA speed
negotiation issue but this e-mail distribution includes T10 and MtFuiji.
I will follow up including only the personal e-mails and drop the reflectors.
Regards,
Harvey Newman
LSI Corporation
-----Original Message-----
From: keiji_katata at post.pioneer.co.jp
[mailto:keiji_katata at post.pioneer.co.jp] 
Sent: Wednesday, February 10, 2010 2:48 AM
To: Frank.Chu at hitachigst.com
Cc: Newman, Harvey; Boyd, James A; James.C.Hatfield at seagate.com;
Jason.Hawken at amd.com; Y.Horiuchi; Mladen.Luksic at wdc.com;
mtfuji5 at avc-pioneer.com; t10 at t10.org; Thomas.Hildner at amd.com
Subject: RE: [MtFuji] Consulting Item from SATA-IO: [Digital] Minutes from
1/25/2010
Hello all,
I received two information from few members.
1. 5 - 8 us PLL latency
Old ODD IC chip PLL has 5 - 8 us delay when disorder on signal happened.
It should be shorter now.
2. difficult on 1us change time
It is difficult to change from GENn to GENn-1 within 1us.
SATA spec. specifies that ALINGp shall be stable from the beginning.
I'm not a specialist but I have an idea as follows.
Host should start the sending host ALINGp at least at 10us before from the
end
of the drive GENn ALINGp.
Drive should start GENn-1 ALINGp at least within 10us from the end of the
drive
GENn ALINGp.
 When host exist, drive ALINGp <-44.6us (max) -> host ALINGp
 When host does not exist, drive ALINGp <-64.6us (max)-> drive ALINGp
The number "10us" could be "5us" or "27.3us" so on.
Best regards,
Keiji Katata
PIONEER CORP.
Frank.Chu at hitachigst.com on 2010/02/06 06:47:17
$B08 at h(B:  "Newman, Harvey" <Harvey.Newman at lsi.com>
cc:    "Boyd, James A" <james.a.boyd at intel.com>,
"James.C.Hatfield at seagate.com"
       <James.C.Hatfield at seagate.com>, "Jason.Hawken at amd.com"
       <Jason.Hawken at amd.com>, "Y.Horiuchi" <jl01881 at jcom.home.ne.jp>,
       "keiji_katata at post.pioneer.co.jp" <keiji_katata at post.pioneer.co.jp>,
       "Mladen.Luksic at wdc.com" <Mladen.Luksic at wdc.com>,
       "mtfuji5 at avc-pioneer.com" <mtfuji5 at avc-pioneer.com>, "t10 at t10.org"
       <t10 at t10.org>, "Thomas.Hildner at amd.com" <Thomas.Hildner at amd.com>
$B7oL>(B:  RE: [MtFuji] Consulting Item from SATA-IO: [Digital] Minutes
from
       1/25/2010
Hi Harvey,
Thank you very much for providing answer and clarifications to Katata-san's
inquiry!
Best Regards,
Frank Chu
San Jose Research Center
Hitachi Global Storage Technologies
3403 Yerba Buena Road, San Jose, CA 95135
tel: 408-717-5224
e-mail: Frank.Chu at hitachigst.com
	     "Newman, Harvey"
	     <Harvey.Newman at ls
	     i.com>							To
				       "keiji_katata at post.pioneer.co.jp"
	     02/05/2010 01:09	       <keiji_katata at post.pioneer.co.jp>
	     PM 							cc
				       "t10 at t10.org" <t10 at t10.org>, "Boyd,
				       James A" <james.a.boyd at intel.com>,
				       "James.C.Hatfield at seagate.com"
				       <James.C.Hatfield at seagate.com>,
				       "Jason.Hawken at amd.com"
				       <Jason.Hawken at amd.com>,
				       "mtfuji5 at avc-pioneer.com"
				       <mtfuji5 at avc-pioneer.com>,
				       "Y.Horiuchi"
				       <jl01881 at jcom.home.ne.jp>,
				       "Mladen.Luksic at wdc.com"
				       <Mladen.Luksic at wdc.com>,
				       "Thomas.Hildner at amd.com"
				       <Thomas.Hildner at amd.com>,
				       "Frank.Chu at hitachigst.com"
				       <Frank.Chu at hitachigst.com>
								   Subject
				       RE: [MtFuji] Consulting Item from
				       SATA-IO: [Digital] Minutes from
				       1/25/2010
Hi Keiji,
You question as posted does not apply to the 1us rate change proposal.
"How long delay does a host have to start sending the Host ALIGNp signal
after device started sending the device ALIGNp signal?"
This question applies during the device state machine DR_SendAlign.  The
proposed 1us rate change applied to device state machine DR_ReduceSpeed
found in the SATA spec. This is the transition between the first 54.6us
block of ALIGNp and the next lower speed ALIGNp.  Your question applies
within a single 54.6us block of ALIGNp. The DR_ReduceSpeed state was set up
to allow the device to change the transmit PLL to the next lower speed and
relock.  This takes much longer than 1us for many products in the field.
Back to your question:
There is no strict specification on the maximum delay the host has to start
sending the ALIGNp.  The specified values are the device sends ALIGNp for
54.6us.  Within this window the host is required to start sending ALIGNp at
the same data rate as the device with sufficient time to allow the device
to detect and reply with SYNCp. The longer the host waits the more likely
it will not provide enough time for the device to detect the ALIGNp and
cause the device to lower to the next speed.
Regards,
Harvey Newman
LSI Corporation
P.S. re-sent with attachment removed.
-----Original Message-----
From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of
keiji_katata at post.pioneer.co.jp
Sent: Thursday, February 04, 2010 11:41 PM
To: mtfuji5 at avc-pioneer.com
Cc: t10 at t10.org; Boyd, James A; James.C.Hatfield at seagate.com;
Jason.Hawken at amd.com; Y.Horiuchi; Mladen.Luksic at wdc.com;
Thomas.Hildner at amd.com; Frank.Chu at hitachigst.com
Subject: Re: [MtFuji] Consulting Item from SATA-IO: [Digital] Minutes from
1/25/2010
* From the T10 Reflector (t10 at t10.org), posted by:
* keiji_katata at post.pioneer.co.jp
*
Hi Frank,
I have a question.
How long delay does a host have to start sending the Host ALIGNp signal
after device started sending the device ALIGNp signal?
Device continues the device ALIGNp signal for 54.6us. For example if a host
should return the Host ALIGNp signal within 10us from a device ALIGNp
signal start, the device has 44.6us for detect the host ALIGNp signal.
After 8 DWORDs ALIGNp signal detection time (maybe 0.1us or less) device
can decide that there is no host that returns the GENx ALIGNp signal. In
this case, the device can judge no host condition at 11us after the start
of sending the device ALIGNp signal. So proposed 1us transition time is
very long enough for the device implementation.
How long delay is specified in the spec?
Best regards,
Keiji Katata
PIONEER CORP.
*
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