[MtFuji] Consulting Item from SATA-IO: [Digital] Minutes from 1/25/2010
Harvey.Newman at lsi.com
Fri Feb 5 12:57:56 PST 2010
Attachment #1: <a href="http://www.t10.org/cgi-bin/ac.pl?t=r&f=r1002051_question_raise.pdf">question_raise.pdf</a>
You question as posted does not apply to the 1us rate change proposal.
"How long delay does a host have to start sending the Host ALIGNp signal
after device started sending the device ALIGNp signal?"
This question applies during the device state machine DR_SendAlign. The
proposed 1us rate change applied to device state machine DR_ReduceSpeed found
in the SATA spec. This is the transition between the first 54.6us block of
ALIGNp and the next lower speed ALIGNp. Your question applies within a
single 54.6us block of ALIGNp. The DR_ReduceSpeed state was set up to allow
the device to change the transmit PLL to the next lower speed and relock.
This takes much longer than 1us for many products in the field.
Back to your question:
There is no strict specification on the maximum delay the host has to start
sending the ALIGNp. The specified values are the device sends ALIGNp for
54.6us. Within this window the host is required to start sending ALIGNp at
the same data rate as the device with sufficient time to allow the device to
detect and reply with SYNCp. The longer the host waits the more likely it
will not provide enough time for the device to detect the ALIGNp and cause
the device to lower to the next speed.
From: owner-t10 at t10.org [mailto:owner-t10 at t10.org] On Behalf Of
keiji_katata at post.pioneer.co.jp
Sent: Thursday, February 04, 2010 11:41 PM
To: mtfuji5 at avc-pioneer.com
Cc: t10 at t10.org; Boyd, James A; James.C.Hatfield at seagate.com;
Jason.Hawken at amd.com; Y.Horiuchi; Mladen.Luksic at wdc.com;
Thomas.Hildner at amd.com; Frank.Chu at hitachigst.com
Subject: Re: [MtFuji] Consulting Item from SATA-IO: [Digital] Minutes from
* From the T10 Reflector (t10 at t10.org), posted by:
* keiji_katata at post.pioneer.co.jp
I have a question.
How long delay does a host have to start sending the Host ALIGNp signal after
device started sending the device ALIGNp signal?
Device continues the device ALIGNp signal for 54.6us. For example if a host
should return the Host ALIGNp signal within 10us from a device ALIGNp signal
start, the device has 44.6us for detect the host ALIGNp signal. After 8
ALIGNp signal detection time (maybe 0.1us or less) device can decide that
is no host that returns the GENx ALIGNp signal. In this case, the device can
judge no host condition at 11us after the start of sending the device ALIGNp
signal. So proposed 1us transition time is very long enough for the device
How long delay is specified in the spec?
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