SNW-3 SATA port selector confusion
Karthikeyan, Kishore K
kishore.k.karthikeyan at intel.com
Mon May 18 16:27:14 PDT 2009
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Attachment #1: <a href="http://www.t10.org/cgi-bin/ac.pl?t=r&f=r0905180_08-283r1.pdf">08-283r1.pdf</a>
Please refer to the attached document
I have a question regarding this approved change to the SAS standard
(approved in July 2008)
The problem describes a scenario where PHY-B (which supports only SNW1) can
falsely detects a port selector due to the 1st COMWAKE it receives as part of
the PHY_CAPABILITIES bit of PHY-A (which supports only SNW3) in response to
PHY-A's COMINIT transmission after hotplug timeout.
Even though this problem looks real at first glance, can it ever really
happen? I say that because I think we are overlooking the fact that PHY-B
will restart OOB only after hotplug timeout which is 10ms minimum to a max of
Lets look at the scenario in detail
If PHY-B detects that the SNW1 and SNW2 are both invalid, it will restart OOB
but ONLY after hotplug timeout (which can only be after a min of 10ms).
But PHY-A which supports only SNW3, will finish SNW-3 in RCDT (500us)+SNTT
(109us) = 610us and then restart OOB after hotplug timeout.
So while PHY-A is transmitting PHYCAP bit as part of SNW3, PHY-B is waiting
for hotplug timeout to expire. So by the time hotplug timeout of PHY-B
expires, PHY-A has already finished SNW3 and waiting for its own hotplug
timer to expire so that it can restart OOB.
So how can we ever hit the condition mentioned in this proposal? What am I
Thanks in advance
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