Seidel, Mark N mark.n.seidel at
Tue Jul 15 11:49:26 PDT 2008

Formatted message: <A HREF="r0807151_f.htm">HTML-formatted message</A>

T10 Phy WG,
The transmitter common-mode voltage limit is specified in two places,
once in Table 61 as a broadband limit, and again in Figure 123 as a
per-frequency-band limit.  Table 61 limits the overall amount to 30
mVrms which translates to 84.9 mVpp if the AC signal is a pure sinusoid.
Figure 123 imposes a limit in the band 100 MHz to 300 MHz (1 MHz
measurement band) to 12.7 dBmV which translates to 4.3 mVrms and 12.2
mVpp if it is a pure sinusoid.
Furthermore, if the transmitter had energy at each band that followed
the limits in Figure 123 it would far exceed the limit in Table 61.  A
collection of discrete frequencies at the limit in Figure 123 would
violate the overall limit, such as (for example) spikes at 100 MHz, 200
MHz, and so on up to 1400 MHz at the Fig 123 limit would violate the
overall limit.	As another example, spikes at 100 MHz, 300 MHz, 500 MHz,
and so on up to 1900 MHz would violate the limit, as would a set of
spikes at 750 MHz, 1500 MHz, 2250 MHz and 3000 MHz.   Note that these
spikes would violate the "energy" aspect of the limit, where they are
combined as a sum-of-squares and then translated effectively into a
sinusoid.  The actual combination of the spikes would depend on the
relative phases; the smallest I could find for the 750/1500/2250/3000
MHz case was approximately 40 mV, so that combination of frequencies
could not all simultaneously be at the Fig 123 levels.
Since these sinusoidal levels are quite small, I propose that we remove
Figure 123 and its limits entirely and retain only the limit in Table
61.  This absolute wide-band time-domain specification will be enough to
limit transmitted CM energy and still allow the silicon and system
designers enough leeway to specify their power supply noise and
filtering limits depending upon the particular frequencies in their
systems.  This leeway should not jeopardize practical systems.
Mark Seidel
Principal Engineer
Intel Corporation
Chandler, AZ

More information about the T10 mailing list