ADI - TapeAlert Bit Ordering

Kevin D Butt kdbutt at us.ibm.com
Wed Jul 3 09:10:38 PDT 2002


* From the T10 Reflector (t10 at t10.org), posted by:
* "Kevin D Butt" <kdbutt at us.ibm.com>
*
To all ADI participants,

SSC-2 specifies in section 4.2.17 when describing the MAM contents that
"Each TapeAlert flag occupies one bit (Flag 1 = MSB, Byte 1; Flag 64 = LSB,
Byte 8)".  We should use this same bit ordering when defining our TapeAlert
frame so as to be consistent with what is already done.

Regards,

Kevin D. Butt
Fibre Channel & SCSI Architect
IBM Tape Microcode,
6TYA, 9000 S. Rita Rd., Tucson, AZ  85744
Tie-line 321; Office: 520-799-5280, Lab: 799-2869, Fax: 799-4138, Email:
kdbutt at us.ibm.com


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