Response to SPI-4 proposal 01-251

Richard Moore richard.moore at qlogic.com
Thu Aug 30 20:57:40 PDT 2001


* From the T10 Reflector (t10 at t10.org), posted by:
* Richard Moore <richard.moore at qlogic.com>
*
Bill,

I'm not sure of the context so the meaning of "independent" in the old
SPI wording may be open to interpretation. Certainly it didn't mean
"independent" in an absolute sense, because both devices must obey the
allowed offset range. The target cannot exceed the maximum offset,
and the initiator cannot drive the offset below zero. It very well may
have been intended to mean "independent" in a timing sense; i.e.,
there is no deterministic timing relationship between a REQ and the
corresponding ACK. I might look this up tomorrow, but since the words
don't appear in SPI-3 or SPI-4 I would say this particular citation
is a moot point.

>>You could say the same thing for the initiator but it is much more of a
>>slave in the REQ/ACK handshake.

SCSI doesn't really speak of "masters" and "slaves". Yes, the target is
in the driver's seat when it comes to deciding what phase is going to
happen next (with the initiator having some ability to override this via
attention condition or reset). But at the low-level handshake level the
relationship is much more symmetrical. Once you are at one offset
extreme, the target is a "slave" to the initiator because it cannot REQ
until it sees another ACK. At the opposite extreme, the initiator is the
"slave" because it cannot ACK what hasn't been REQed. In between these
extremes both may send REQs or ACKs at any time, but nothing is specified
as to when a target *must* REQ or when an initiator *must* ACK.

Furthermore, in DT mode, REQ edges (and ACK edges) must occur in assertion/
negation pairs, so if the target has sent an asserting edge, and the offset
is at one, why would it be unreasonable for the initiator to expect a
negating edge, especially given that the target cannot end the phase without
doing this? The problem John is trying to avoid could only occur at the low
end of the allowable offset range. Why wouldn't the target take advantage
of the offset range available to it and issue more REQ edges, especially if
not doing so causes a performance hit equal to a round-trip bus delay?

Finally, if this is indeed a hole in the spec, is a measure that would
outlaw existing (and currently allowable) designs the proper way to plug it?

Richard Moore
QLogic Corporation

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