Is WR_FLOW bit useless?!?

Sriram Srinivasan srirams at lsil.com
Fri Nov 10 08:48:46 PST 2000


* From the T10 Reflector (t10 at t10.org), posted by:
* Sriram Srinivasan <srirams at lsil.com>
*
   If the target can ALWAYS use a phase change to signal the end of the 
stream AND DT_DATA_OUT streaming is MANDATORY (according to para. 8 in 
section 4.9.3.3) what purpose does the WR_FLOW bit serve in the PPR 
message?
   
   \Sriram\
~ 
~ Sriram,
~ 
~ I was not happy with it but the agreement was that a target could end 
a
~ stream by changing phase or by going bus free.
~ 
~ 
~ Bill Galloway
~ BREA Technologies, Inc.
~ P: (281) 530-3063
~ F: (281) 988-0358
~ BillG at breatech.com
~ 
~ -----Original Message-----
~ From: owner-t10 at t10.org [mailto:owner-t10 at t10.org]On Behalf Of Sriram
~ Srinivasan
~ Sent: Thursday, November 09, 2000 4:50 PM
~ To: t10 at t10.org
~ Subject: Streaming Clarification
~ 
~ 
~ * From the T10 Reflector (t10 at t10.org), posted by:
~ * Sriram Srinivasan <srirams at lsil.com>
~ *
~    I have a question on "how to end a read stream".
~ 
~    00-378r0 (SPI-4 rev1) states:
~ 
~    1) in the last paragraph (and NOTE-5) of section 4.9.3.3 DT_DATA_IN
~       flow control is implied by the term "read streaming"
~ 
~    2) in section 16.3.10.1 that RD_STRM must be negotiated to a 1 so
~       that read streaming can be used.
~ 
~    So putting 1) and 2) together can it be deduced that the initiator
~ will EXPECT "DT_DATA_IN flow control" (using P_CRCA) to happen during
~ read streams?  In other words:
~ 
~    a) Is it mandatory for the target to use the P_CRCA to end the read
~ stream?  Or
~ 
~    b) can it do a phase change at the end of a data stream IU and end
~ the stream (as stated in paragraph 6 of section 14.3.4 in 00-378r0)?
~ 
~    c) Or is the target allowed to do either a) or b) stated above?
~ 
~    thanx,
~    \Sriram\
~ 
~ 
~ ----------------------------------------------------------------------
~ 
~  Sriram Srinivasan                       Sriram.Srinivasan at lsil.com
~  ASIC Design Engineer, LSI Logic,
~  2001 Danfield Ct., 				Phone: 970-206-5847
~  Fort Collins, CO 80525				FAX  : 
970-206-5244
~ ----------------------------------------------------------------------
~ 
~ *
~ * For T10 Reflector information, send a message with
~ * 'info t10' (no quotes) in the message body to majordomo at t10.org
~ 

----------------------------------------------------------------------

 Sriram Srinivasan                       Sriram.Srinivasan at lsil.com
 ASIC Design Engineer, LSI Logic,
 2001 Danfield Ct., 				Phone: 970-206-5847
 Fort Collins, CO 80525				FAX  : 970-206-5244
----------------------------------------------------------------------

*
* For T10 Reflector information, send a message with
* 'info t10' (no quotes) in the message body to majordomo at t10.org




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