Spec issue on MSE leakage current in SPI-3

Bill Galloway BillG at breatech.com
Thu Apr 29 22:52:11 PDT 1999


* From the T10 Reflector (t10 at symbios.com), posted by:
* "Bill Galloway" <BillG at breatech.com>
*
Well.....

Actually the resistance is 55 ohms not 110 as far as DC is concerned. I do not
think the spec needs to fix broken terminators so I think we can ignore a
passively negated bus.  The only issue I have is with an actively negated bus.
In this case the terminators are probably not supplying any current, only the
negation driver. This driver could put out a lot of current at 4.0V.

I think that there are two strong and opposing forces at work here. On one side
are the suppliers of silicon that have a very hard time meeting these specs and
say that they need relief. On the other side are the systems vendors that do not
want to deal with customers that are upset because previous generation devices
were outlawed. It goes against promises of investment protection.

If we are really going to outlaw previous generation devices we might as well
get rid of all that cumbersome negotiation too. ;-) (I just heard a big "Amen"
|from the gallery.)


Bill Galloway
BREA Technologies, Inc.
P: (281) 530-3063
F: (281) 988-0358
BillG at breatech.com

-----Original Message-----
From: owner-t10 at Symbios.COM [mailto:owner-t10 at Symbios.COM]On Behalf Of
Daniel_F_Smith at notes.seagate.com
Sent: Thursday, April 29, 1999 7:02 PM
To: t10 at Symbios.COM
Subject: RE: Spec issue on MSE leakage current in SPI-3


* From the T10 Reflector (t10 at symbios.com), posted by:
* Daniel_F_Smith at notes.seagate.com
*
Correct me if I'm wrong.  A transceiver, sinking maximum current, can only
pull 2.85V divided by 110 ohm's worth of current from the bus (25.9mA).  If
an active terminator were to go "open-loop", then the top of a 110 ohm
termination impedance would see 5.5V maximum (its input supply running 10%
high).  Calling that worst case, the max current it could sink would be
5.5V divided by 110 ohms, or 50mA.  But of course, the input clamp only
needs to clamp enough current to get the bus voltage down to Vdd of the LVD
device.  If the input clamp were to draw enough current to protect itself,
is that enough to interfere with a normal SE bus transfer?  That's the $64
question.

*
* For T10 Reflector information, send a message with
* 'info t10' (no quotes) in the message body to majordomo at symbios.com





More information about the T10 mailing list