Spec issue on MSE leakage current in SPI-3
lohmeyer at ix.netcom.com
Thu Apr 29 13:35:07 PDT 1999
* From the T10 Reflector (t10 at symbios.com), posted by:
* John Lohmeyer <lohmeyer at ix.netcom.com>
At 4/29/99 11:27 AM, you wrote:
>* From the T10 Reflector (t10 at symbios.com), posted by:
>* wally at eng.adaptec.com (Walter Bridgewater)
>If VCC is 3.3 volts, is it fair that you measure leakage
>at 4.1 volts?
>Is this one of the main points of this issue?
Exactly. I think that allowing more than 20 uA leakage current when a
signal is above the local Vcc should be permitted and should not harm
signal integrity on the bus. I agree with Kevin's comment about Vcc not
being a SCSI signal, so perhaps what ought to be done is reduce the 4.1 V
parameter to some lower value to accomodate the newer semiconductor
processes. The question is, "How low should we go?"
John Lohmeyer Email: lohmeyer at ix.netcom.com
LSI Logic Corp. Voice: +1-719-533-7560
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