PROPOSAL FOR FIBRECHANNEL MODE PAGE
GFRAZIER at AUSVM6.VNET.IBM.COM
GFRAZIER at AUSVM6.VNET.IBM.COM
Thu Jul 11 08:50:17 PDT 1996
* From the SCSI Reflector, posted by:
* GFRAZIER at AUSVM6.VNET.IBM.COM
Four of the bits in the proposal (attached below) require a target to
violate FC-AL specifications:
DTIPE: When set to one, the target is required to unconditionally enable
itself on to the loop if it receives an LPEyx, where y is it's hard
address. This violates FC-AL rules if a LIP has been received since it was
disabled, or if the target was powered off. FC-AL sections 7.8.1 - 7.8.3
make this clear. They further state that LPEfx must be used to enable the
port in this case since the port has no valid address--not even if it has a
DTOLI: When set to one, the target is not allowed to transmit a LIP
following insertion onto the loop. This violates FC-AL, which
requires the target to go through the initialization procedure if a LIP
or power cycle occurred when it was disabled.
ALWLI: This also requires the target to use it's hard address without going
through loop initialization. It therefore violates FC-AL for similar
reasons as mentioned above.
DLM: This bit requires the target only to repeat LISM frames. This means
that it must never put it's initial AL-PA in the LISM frame. This violates
FC-AL section 10.4.3, #2), which states that "Each L_Port shall
continuously transmit LISMs with the D_ID and S_ID fields set to
hex'0000XX' (where 'XX' is its inital AL_PA) and its port name in the
These bits may be required to support certain closed environments, but a
device which implements them as defined becomes noncompliant with FC-AL,
and will not correctly interoperate with compliant devices.
gfrazier at ausvm6.vnet.ibm.com
>* From the SCSI Reflector, posted by:
>* Gerry Houlder <Gerry_Houlder at notes.seagate.com>
>This proposal (document 96-195) will be introduced at the Colorado Springs
>Working Group meeting (July 16-17). Comments are welcome at the meeting or
>Date: July 10, 1996
>To: X3T10 Committee
>From: Gerry Houlder, Seagate Technology
>Subj: Add Mode Page for fibre channel features
>With Fibre Channel - Arbitrated Loop (FC-AL) interface, there are
>characteristics implementors desire to customize. This proposal includes
>control bits for interface characteristics of Fibre Channel Private Loop that
>implementors desire to control.
>These controls are for characteristics that must be known when the device is
>powered on. They cannot be set during login or a later command. This behavior
>can be met by use of a Mode page with saved values. In fact the parameters will
>have to be saved in flash memory, so there is no wait for device spinup before
>the parameters are available. Therefore, the characteristics below will be
>proposed for inclusion in a Fibre Channel SCSI mode page. The committee needs
>to discuss whether this should be a new mode page or an addition to an existing
>mode page. The committee should also determine if these controls can apply to
>other serial interfaces. The current descriptions are obviously worded for
>Seven bits are needed, as follows:
>When Disable Target Initiated Port Enable (DTIPE) bit is one, the target waits
>for an Initiator to send the Loop Port Enable primitive before inserting itself
>into the loop. The target uses the hard address available in the SCA connector
>(or device address jumpers) to determine if primitives are addressed to it.
>When DTIPE bit is zero, the target enables its port into the loop without
>waiting for a Loop Port Enable primitive.
>When Disable Target Originated Loop Initialization (DTOLI) bit is one, the
>target does not generate the Initializing LIP following insertion into the
>loop. The target will respond to an Initializing LIP when it is received. The
>target shall generate the Loop Failure LIP if it detects loop failure at its
>input and the Initializing LIP when the loop failure is corrected.
>When DTOLI bit is zero, the Target generates the Initializing LIP after it
>enables a port into a loop.
>When Allow Login Without Loop Initialization (ALWLI ) bit is one, the target
>shall use the hard address available in the SCA connector (or device address
>jumpers) and accept logins without verifying the address with loop
>When ALWLI bit is zero, the target is required to verify its address through
>the Loop Initialization process before a login is accepted.
>When Disable Soft Address (DSA) bit is one, the target does not select a soft
>address if there is a conflict for the hard address selection during Loop
>Initialization. In this case the target enters the nonparticipating state. If
>the Target detects loop initialization while in the nonparticipating state, the
>target will again attempt to get its hard address.
>When DSA bit is zero, the Target attempts to obtain a soft address during the
>Loop Initialization process.
>When Disable Loop Master (DLM) bit is one, the target does not become loop
>master. The target only repeats LISM frames it receives. This allows the
>initiator to be loop master during loop initialization.
>When DLM bit is zero, the Target may become loop master during in the Loop
>When Disable Discovery (DDIS) bit is one, the target does not require receipt
>of Address or Port Discovery following loop initialization. The target resumes
>processing of tasks on completion of loop initialization.
>When DDIS bit is zero, the target must wait to receive an Address or Port
>Discovery before it resumes processing tasks for that initiator.
>When Disable Target Fairness (DTF) bit is one, the target is not required to
>follow the Arbitrated Loop fairness rules for arbitrating and sending frames it
>When DTF bit is zero, the target is required to follow the arbitrated loop
******************************END OF REFERENCED NOTE***************
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