SPI-2/Fast-40 pins

Jim McGrath jmcgrath at qntm.com
Sun May 21 18:30:47 PDT 1995

                      Subject:                              Time:  6:15 AM
  OFFICE MEMO         SPI-2/Fast-40 pins                    Date:  5/21/95

In the SPI-2 minutes it was noted that pin outs were discussed,
and I believe that the assumption was that we would use 2
pins (+ and -) for each SCSI signal.  I would like to question that proposal.

First, some background.  Drive ASICs today are limited by pinouts
more often that gate counts.  This means that every pin added
has the potential to increase ASIC cost.  Obviously the main
reason to go to the new drivers is higher speeds/longer distances,
so REQ/ACK are obvious candidates.  I am not as sure that data
and parity lines need the new transceivers at Fast-40 speeds,
but concede that cable length considerations probably force our
hand.  But why use anything other than single ended for the other
lines?  They should work find at the slow speeds required, and at
lengths at least good to 6 m (maybe longer).  Note that the
DIFFSNS line itself is single ended!

This question is extremely important, since the other lines
constitute 7 extra pins (compared to the 11 data/parity/REQ/ACK
for narrow SCSI), which is 2/3 of the minimum additional pins.
Has anyone given thought to this?


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