System Deskew Delay ??

Henry Wong hwong at asic.qntm.com
Wed Jul 12 16:27:03 PDT 1995


Can someone explain some questions I have on the SCSI System Deskew Delay
values in the SPI?

 (1) Exactly what is it & how is it used?...................
     My feeling is that it is the total w.c. max budget that should 
     be allowed for deskewing "skewed" signals (as a result of cabling, 
     connector, card/board foils, & etc) as they relate to the SCSI Bus
     operation.  To me, the max System Deskew Delay is largest during 
     an asynchronous data transfer where the time from the assertion-to-
     deassertion of say the REQ edges is dependent on the total "prop & 
     skew" of signals when going out and back (ie. Target Assert REQ...
     wait for detection of ACK assertion at Target... then the Deassert
     of REQ by Target).  If the above is correct,  then does this mean in 
     Synchronous mode one can then safely say System Deskew Delay is reduced 
     to 1/2 of the max value in SPI?.... the reasoning being that only 1 
     leading assertion edge is used and thus again there is no "round trip" 
     event dependency as seen in Async mode.  This leads to the second question.
     
 (2) How is/was the maximum System Deskew Delay calculated/determined in
     SPI for FAST/FAST20?...............
     System Deskew Delay is apparently relative to the connectors....
     if this is correct,  then the only contributors to the value must be 
     the Cable delay skew, Cable distortion skew, Tolerance, and the 
     receiving card/board foil (the latter is included if the "round trip" 
     theory mentioned above is correct)....so 
     
        System Deskew Delay 1 way = 
                                     Cab delay+Cab distortion+tolerance skews
                              ...and...
        System Deskew Delay (max <=> "round trip") =
                                     2 x (System Deskew Delay 1 way)                             
     
    ---> Since the equations do not properly match data in the SPI Table
         I am at a loss as to what, how, & where one uses the maximum
         System Deskew Delay timing values ????????
         
- Henry (hwong at asic.qntm.com)         




More information about the T10 mailing list