Minutes of the ATA-Extensions Special Working Group Meeting Held October 26-27, 1993, in Milpitas, CA, at the Crown Sterling Suites hotel. Chaired by: Steve Finch, SSI. Hosted by: Jim McGrath, Quantum, and Richard Kalish, Adaptec. Minutes recorded by: Robbie Shergill, National Semiconductor. 1. Steve Finch opened the meeting at 1:00PM by thanking the hosts and stating the purpose of the meeting and some pertinent ANSI mechanisms. He asked each attendee to introduce themselves and also sign the attendees list. NAME COMPANY PHONE INTERNET Richard Kalish Adaptec 408-957-7169 rkalish@rahul.net Al Pham Adaptec 408-957-4804 alp@adaptec.com Kenneth Curt Appian Technology 408-730-5406 Joe Chen Cirrus Logic 510-226-2101 John Geldman Cirrus Logic 510-249-4953 johng@cirrus.com John DeRoo Digital Equipment 508-841-6417 deroo@grout.adv.shr.dec.com Larry Lamers Maxtor 408-432-3889 larry_lamers@maxtor.com Tom Newman Mission Peak Designs 510-790-0230 Robbie Shergill National Semi. 408-721-7959 rss@berlioz.nsc.com Jim McGrath Quantum 408-894-4504 JMcGrath@qntm.com Jim "Yogi" Schaffner Q-Logic 714-668-5365 yogi@emulex.com John Masiewicz Seagate 408-439-2152 masiewicz@notes.seagate.com Dean Wallace Silicon General 714-898-8121 Steve Finch Silicon Systems 714-573-6808 572-3283@mcimail.com Peter Chambers VLSI Technology 602-752-6395 vlsi!chambe_p@asuvax.eas.asu.edu 2. Agenda for this meeting was circulated by Steve Finch. It was modified to the following: Tuesday (10/26): 1. Group Introductions 2. Review of Agenda 3. Time and Place for Next Meeting 4. Status of Other ATA Issues (ATAPI) 5. High Speed ATA Timing a. simulations b. 93-157r1 c. finalize dma timing d. pio issues Wednesday (10/27): 6. a. Status of ATA-2 Editing b. Issues related to SFF-8011 c. ATA-2 Comments (Masiewicz) d. Downloadable firmware 3. Time and Place for the Next Meeting: General feeling was to go back to the one-day meetings we have been holding. It was decided to move out the next meeting of this SWIG to early December because of conflict with Comdex and Thanksgiving holidays. The next several meetings concerning ATA are as follows: Nov 8: Colorado Springs (as part of X3T9.2) Dec 8: Milpitas. Host: Adaptec (probably at Adaptec facility - will be communicated later) Jan 10: San Diego (as part of X3T9.2) Jan 26: Milpitas. Host: Cirrus (probably at Crown Sterling Suites hotel - will be communicated later) 4. Steve Finch gave a brief status of the ATAPI proposal. The ATAPI group has forwarded it to SFF and Dal Allen has accepted it as an SFF project. It is intended that at the special SFF meeting on 11/3/93 the CD-ROM command set will be separated for publishing as the Multimedia Command Set; and the packetized protocol will be forward to the X3T9.2/ATA. A project proposal is being drafted for this purpose. There was a brief discussion on how the packetized protocol will fit within the ATA-2 and how the ATA-2 will fit within the SCSI-3 standards architecture. 5. High Speed ATA Timing: a) Dean Wallace circulated the outputs of his simulations. He had intended to verify these results with Tom Hanan's (Western Digital) lab setups, but had been unable to do so because Tom has been ill. The group analyzed Dean's simulation results and attempted to better focus further analysis by eliminating some of the options. it was fairly clear that we must use active-negation, for example. John Masiewicz pointed out the importance of series resistors and controlled rise and fall times in reducing ground bounce; this sentiment was generally echoed by others. Robbie Shergill raised the possibility of increasing the number of ground lines in the cable. This was deemed undesirable because of compatibility reasons. It was felt that the cable length had less of a negative effect on the signal quality than did the existance of two drives on the cable. After a lengthy discussion it was decided that Dean Wallace should limit his simulation to one drive only but increase the cable length to 18". If this simulation shows further headroom, then we can attempt adding a second drive. It was also felt that the node capacitance did not have as much impact as was previously felt. So, the node capacitance should be increased to 25pF. Dean will use the following parameters next: - std flat ribbon cable, 18" long, with one drive only; - series termination on all signals except DASP, PDIAG and CSEL; - parallel termination on the five signals previously identified; - 20MB/s operation only; - 25pf/node capacitance; - active negation on all signals except IORDY, PDIAG, DASP and CSEL. (IORDY can be active negated after the drive is selected). - edge rate limited to 5ns. Steve Finch suggested that perhaps data bus driver offsetting should be made a requirement. John Masiewicz stated that splitting the data bus beyond an 8/8 split doesn't help much. Robbie Shergill agreed and added that any more than an 8/8 split will probably get too close to the timng budget limit at the 20MB/s type operation. b) John Geldman presented rev. 1 of his proposal on 20MB/s timing (93-157r1). A new addition to this proposal is the "advanced pio data in command protocol" which adds a status register read after the last data transfer for the purpose of error coverage. John had added a fixed delay after the last transfer and this was contested John Masiewicz and Steve Finch preferred setting BUSY and clearing instead of the delay. John agreed that this would be better, except for the concern that some older BIOSes may have a fit. Tom Newman suggested doing an interrupt instead of setting busy because busy=1 may be construed by an older BIOS to mean that something is broken with the drive; whereas the interrupt only causes the system to set a bit which the older BIOS will not care to read if it considers the transfer to be done. Finally, it was decided to stay with setting and clearing BUSY with the understanding that this feature needs to be turned on with a Set Features so an older BIOS will not run into this behavior. A need for testing was felt, however, and Larry Lamers was requested to implement this change on a drive and put it through compatibility testing in Maxtor lab. c) The DMA timings were discussed as included in John Geldman's document. The group considered changing Mode 2 cycle time to 55ns, but in the end no significant changes were made. d) PIO Timing Mode: John Masiewicz raised the issue of whether Mode 4 timing applies to non-data register accesses. There was considerable discussion on this, but the final consensus was that the device can, and will for practical reason, use the fast timing for all transfers, but the host should do the slowest non-data register access that is dictated by the slower of the two devices on the cable - if that's the case. Steve Finch pointed out that this would've been a problem if the faster timings violated some hold time requirement of the slower timing sets, but this is not the case. Considerable discussion took place on the need for IORDY flow-control for 20MB/s operation. Jim McGrath argued that the 20ns timing requirement for IORDY negation (tA) is too demanding for Quantum's ASIC vendor's current technology silicon and, therefore, will ultimately translate into higher chip costs. Other silicon vendors present disagreed with this. The group did agreed that only one flow-control method must be chosen for 20MB/s operation. Robbie Shergill pointed out that this argument has continued over two meetings now without anything new being said; and Steve Finch asserted that the only way to end this is to take a vote. He asked everyone to be clear on their standing by yhe next meeting and be prepared to vote. ************* 10/27/93 (Wednesday) Session: Steve Finch thanked Adaptec for hosting the meeting and summarized the previous day's work. The attendees introduced themselves. Joe Chen (Cirrus) objected to limiting Mode 4 to only one device. Others clarified that if Dean's simulations show enough headroom then the second device can be added back again. John Masiewicz raised the issue of market's expectations of 20Mb/s operation. He asserted that such expectations are premature and will cast a shadow on Mode 3 drives. All others agreed, and Jim McGrath suggested that we should come up with a timeline and communicate it in order to quell premature expectations of Mode 4. Steve Finch came up with language on this. This will be forwarded to x3t9.2 in Colorado Springs. Robbie Shergill stressed the need for X3T9.2 to communicate this to the market through a press release. 6a) Steve Finch gave a status of the editing work going on with the ATA-2 document. He described the modified organization of the document and asked for feedback. Steve stated that his intention is to bring the rev. 2 of the document back in the January meeting of this working group. At that point, everyone will be expected to read the document completely. John Masiewicz stated that the main objectives for the ATA-2 should be to "clean-up" the existing ATA and to include Mode 3 operation. We should not wait for Mode 4. Others also agreed with this and Jim McGrath stated that ATA is a standard that needs to be updated on a regular basis anyway. b) SFF-8011 Issues: The SFF-8011 is intended to be used as the base document for defining Mode 3 and, as such, it is expected to be transferred virtually directly into the ATA-2 specification. However, Robbie Shergill had recently discovered some errors in rev. 1.1 of SFF-8011. He presented a list of these errors and the group added other corrections or enhancements to be made to the timing diagrams on ATA-2 document. The group decided that Steve Finch should forward this list to the SFF group and recommend revising the SFF-8011. Some confusion was discovered on word 52 of Identify Drive in relation to words 62 and 63. It was decided that word 52's usage should be recommended against - use 62 and 63 to define your dma mode support. Richard Kalish (Adaptec) pointed out that on a certain Mode 3 disk drive word 51 shows support for mode 2, while word 64 shows mode 3 support. Jim McGrath explained that this has to be done for backward comapatibility. It was agreed that ATA-2 will add language to clarify this. This should also be communicated to SFF for clarification on 8011. c) ATA-2 Comments by John Masiewicz: John presented his document in detail and the group discussed each item in order. John will revise his proposal based on the work done in this meeting and the elements of this proposal, in particular Table 2 and Table 3, will be added to 948D document (ATA-2). However, further modifications are expected. It was decided that ATA-2 will not refernece a vendor's part number (connector) - EIA number will be used instead. We should ask the connector people for their EIA number. It was decided that power connector section should also show voltage level and current requirements. It was decided that reference point for AC timing specifications will be 1.4 volts. Richard Kalish pointed out the need for defining a "glitch" on the RESET line. d) Downloadable Firmware: Jim McGrath described his proposal. He has modified his original proposal to have the ability to activate different versions of the code based on tags and also to delete some code that was previously downloaded. Larry Lamers objected to creating an overly complex command. Larry asserted that vendor unique commands can be used for the more advanced features. Jim's whole point, however, is to avoid vendor unique commands. There was no resolution. 7) The meeting was adjourned at 12:00 noon. -----------------------------------------------------------------------------