X3T9.2/91-001 Rev 1









January 4, 1991
Revised January 15, 1991

To:       X3T9.2 Committee
From:     John Lohmeyer, NCR Principal Member of X3T9.2
Subject:  SCSI-3 Wide Bus Driving Rules Selection and Reselection Phases

The rules in George Penokie's X3T9.2/90-48 Rev 7 document defining which DATA 
BUS bytes must be driven during SELECTION and RESELECTION phases preclude 
some otherwise valid and desirable implementations of wide SCSI.  In 
particular, the rule requiring all implemented DATA BUS bits to be driven 
during SELECTION and RESELECTION phases is not necessary and increases the 
complexity of implementing an SCSI device that supports a wider data path than 
the total number of SCSI IDs that it supports.

I propose we alter sections 5.1.3 and 5.1.4.1 in the SCSI-3 Parallel Protocol 
document to reflect the changes shown on the next page.  (I am assuming we use 
appropriate sections of X3T9.2/90-048 Rev 7 as the basis for the SCSI Parallel 
Protocol working document.)



Revision 1:    Item d) in 5.1.3 was corrected by deleting "P2,".  The 
               January '91 Working Group has recommended that this proposal
               be accepted for SCSI-3.



















5.1.3. SELECTION Phase

  [two unchanged paragraphs not shown]

  The initiator shall set the DATA BUS to a value which is the OR of its SCSI 
ID bit and the target's SCSI ID bit and it shall assert the ATN signal 
(indicating that a MESSAGE OUT phase is to follow the SELECTION phase).  
Minimally, the initiator shall drive all DATA BUS bytes containing the two 
SCSI ID bits plus any lower DATA BUS bytes.  All parity bits associated with 
these bytes shall also be driven.  Optionally, the initiator may drive its 
entire implemented DATA BUS width.  In this case, all associated parity bits 
shall be driven.  The initiator shall then wait at least two deskew delays and 
release the BSY signal.  The initiator shall then wait at least a bus settle 
delay before looking for a response from the target.

  [unchanged paragraph not shown]

  The SCSI device shall check parity as follows:
  (a) DB(7-0,P) shall be checked for odd parity
  (b) DB(15-8,P1) shall be checked for odd parity if there is at least 
one bit active on DB(31-8,P1,P2,P3)
  (c) DB(23-16,P2) shall each be checked for odd parity if there is at least 
one bit active on DB(31-16,P2,P3)
  (d) DB(31-24,P3) shall each be checked for odd parity if there is at least 
one bit active on DB(31-24,P3).

  IMPLEMENTORS NOTE:  These rules are necessary to permit interoperation of 
  devices with different bus widths.  For example, if a 16-bit device selects 
  a 32-bit device, the 32-bit device will observe invalid parity on the upper 
  16 bits of the data bus.

  [remainder of section unchanged and not shown]

5.1.4.1. RESELECTION   
  Upon completing the ARBITRATION phase, the winning SCSI device has both the 
BSY and SEL signals asserted and has delayed at least a bus clear delay plus a 
bus settle delay.  The winning SCSI device becomes a target by asserting the 
I/O signal.  The winning SCSI device shall also set the DATA BUS to a value 
that is the logical OR of its SCSI ID bit and the initiator's SCSI ID bit.  
Minimally, the target shall drive all DATA BUS bytes containing the two SCSI 
ID bits plus any lower DATA BUS bytes.  All parity bits associated with these 
bytes shall also be driven.  Optionally, the target may drive its entire 
implemented DATA BUS width.  In this case, all associated parity bits shall be 
driven.  The target shall wait at least two deskew delays and release the BSY 
signal.  The target shall then wait at least a bus settle delay before looking 
for a response from the initiator.

  [remainder of section unchanged and not shown]