DOC. #: X3T9.2/88-078R0
To: ANSI X3T9.2 Committee                               July 11, 1988

From: Jim Schuessler, National Semiconductor

Re: Update to ESDI read-delay spec.

The ESDI spec currently states that the read propogation delay
(disk to interface) shall not exceed 9 NRZ bit cycle times or the
subscripted value provided by the drive in Request General Configuration.
With a particular (1,7) code, 9 NRZ cycle times cannot be
met.  It takes a minimum of 8 cycles just for the decoder.  Our pulse
detector delay is 1 NRZ cycle, and the synchronizer delay is 1 to 1 1/2
NRZ cycles, for a total of about 10 1/2 NRZ cycles at high data rates.

To allow a little slack, we would like the maximum allowable delay to be
12 NRZ cycle times.  This should be sufficiently less than the 16 bit
constraint that we were advised the original spec was concerned with, 
and still allow ample time for decoding.

The effected sections of the ESDI draft are 7.7.1.5.1 and 8.1.3.
Replacement wording simply involves changing the 9's to 12's.  The last
sentence of 7.7.1.5.1 should read:

        If this value is not returned by the drive, the 
        controller shall assume that the Read Data Delay 
        is less than or equal to 12 bits,  See also 8.1.3.

The first sentence of 8.1.3. should read:

        Data (read) at the interface is delayed by up to 
        12 bit times from the data recorded on the disk 
        media or according to the subscripted value 
        provided in Request General Configuration subscripts.


Thank you for consideration of this change,



                                Jim Schuessler