8.2.5. WRITE AND VERIFY Command Peripheral Device Type: Direct Access Operation Code Type: Optional Table 8-38: WRITE AND VERIFY Command ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Operation Code (2Eh) | -----|-----------------------------------------------------------------------| 1 | Logical Unit Number | DPO |Reserved| WrtSme | BytChk | RelAdr | -----|-----------------------------------------------------------------------| 2 | (MSB) | -----|--- ---| 3 | | -----|--- Logical Block Address ---| 4 | | -----|--- ---| 5 | (LSB) | -----|-----------------------------------------------------------------------| 6 | Reserved | -----|-----------------------------------------------------------------------| 7 | (MSB) | -----|--- Transfer Length | 8 | (LSB) | -----|-----------------------------------------------------------------------| 9 | Vendor Unique | Reserved | Flag | Link | ============================================================================== The WRITE AND VERIFY command (Table 8-28) requests that the target write the data transferred from the initiator to the medium and then verify that the data is correctly written. The data is transfered once from the initiator to the target. A byte check (BytChk) bit of zero causes the verification to be simply a medium verification (CRC, ECC, etc) a medium verification to be performed. If the MODE SELECT command is implemented, and the Verify Error Recovery Parameters page is also implemented, then the current criteria specified by that page defines the medium verification. If the Verify Error Recovery Parameters page is not implemented, then the verification criteria is vendor unique. In either case, no data comparison is performed. A BytChk bit of one causes a byte-by-byte compare of data written on the peripheral device medium and the data transferred from the initiator. If the compare is unsuccessful, the command shall be terminated with a CHECK CONDITION status and the sense key shall be set to MISCOMPARE. The logical block address specifies the logical block at which the write operation shall begin. The transfer length specifies the number of contiguous logical blocks of data that shall be transferred. A transfer length of zero indicates that no logical blocks shall be transferred. This condition shall not be considered as an error and no data shall be written. Any other value indicates the number of logical blocks that shall be transferred. See section 6.2.4 for a description of the cache control bits (DPO and FUA). See section 6.2.5 for a description of the relative address bit (RelAdr). A Write Same (WRTSME) bit of zero causes the command to be done as a normal WRITE. A WRTSME bit of one causes a Write Same capability to occur. Only one logical block of data shall be sent during the Data Out Phase, regardless of the transfer length. The transfer length specifies the number of contiguous logical blocks to be written. All logical blocks written shall be written with the same data as the first logical block. A transfer length of zero shall be handled different when the WRTSME bit is one. A transfer length of zero shall represent that the data be continuously written from the logical block address specified in the command block until the last logical block addressable. IMPLEMENTOR'S NOTE: The WRITE AND VERIFY command specifically states that the data shall not be transfered twice (i.e., once for the write pass, and once for the verify pass) when performing a byte compare. If there is a need for two transfers to occur (e.g., to ensure the integrity of the path to the media), then the initiator should issue a WRITE command with the LINK bit set followed by a VERIFY command, transfering the same data on each command. 8.2.6. VERIFY Command Peripheral Device Type: Direct Access Operation Code Type: Optional Table 8-39: VERIFY Command ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Operation Code (2Fh) | -----|-----------------------------------------------------------------------| 1 | Logical Unit Number | DPO |Reserved|Reserved| BytChk | RelAdr | -----|-----------------------------------------------------------------------| 2 | (MSB) | -----|--- ---| 3 | | -----|--- Logical Block Address ---| 4 | | -----|--- ---| 5 | (LSB) | -----|-----------------------------------------------------------------------| 6 | Reserved | -----|-----------------------------------------------------------------------| 7 | (MSB) | -----|--- Verification Length | 8 | (LSB) | -----|-----------------------------------------------------------------------| 9 | Vendor Unique | Reserved | Flag | Link | ============================================================================== The VERIFY command (Table 8-29) requests that the target verify the data written on the medium. A byte check (BytChk) bit of zero causes the verification to be simply a medium verification (CRC, ECC, etc) a medium verification to be performed. If the MODE SELECT command is implemented, and the Verify Error Recovery Parameters page is also implemented, then the current criteria specified by that page defines the medium verification. If the Verify Error Recovery Parameters page is not implemented, then the verification criteria is vendor unique. In either case, no data comparison is performed. A BytChk bit of one causes a byte-by-byte compare of data on the medium and the data transferred from the initiator. If the compare is unsuccessful, the command shall be terminated with a CHECK CONDITION status and the sense key shall be set to MISCOMPARE. The logical block address specifies the logical block at which the verify operation shall begin. The verification length specifies the number of contiguous logical blocks of data that shall be verified. A transfer length of zero indicates that no logical blocks shall be verified. This condition shall not be considered as an error. Any other value indicates the number of logical blocks that shall be verified. See section 6.2.4 for a description of the cache control bits (DPO and FUA). See section 6.2.5 for a description of the relative address bit (RelAdr).