BSR X3.131-198_ NOTE: Revision 17B consists of changes made by the X3T9/84-40 REV 1B X3T9.2 task group at their December 10, 1985 meeting. X3T9.2/82-2 These changes were made in order to make the X3T9.2 REV 17B draft proposed standard consistent with the ISO/TC97/SC13 draft proposal. See page 1.1 for a changed page list. draft proposed American National Standard for information systems - SMALL COMPUTER SYSTEM INTERFACE (SCSI) December 16, 1985 Secretariat Computer and Business Equipment Manufacturers Association Abstract: This standard defines mechanical, electrical, and functional requirements for attaching small computers with each other and with low- to medium-performance intelligent peripherals such as rigid disks, flexible disks, magnetic tape devices, printers, and optical disks. The resulting interface facilitates the interconnection of small computers and intelligent peripherals and thus provides a common interface specification for both systems integrators and suppliers of intelligent peripherals. POINTS OF CONTACT: William E. Burr (X3T9.2 Chairman) John B. Lohmeyer (X3T9.2 Vice Chairman) U.S. Department of Commerce NCR Corporation National Bureau of Standards 3718 N. Rock Road Technology A-216 Wichita, KS 67226 Gaithersburg, MD 20899 (316) 688-8703 (301) 921-3723 CHANGED PAGE LIST At their December 10, 1985 meeting, the X3T9.2 task group made a number of changes to Revision 17 of this document. (Revision 17A was distributed at the meeting proposing some of the changes; the remainder of the changes were made at the meeting.) The primary reason for making these changes is to keep this document consistent with the ISO/TC97/SC13 SCSI draft proposal. The pages that have changed since Revision 17 are listed below: Page Change ------- ------------------------------------------------------------------- 1 Changed revision number and date. 1.1 Replaced changed page list. 2 Editorial revisions to the foreword. 7-7.1 Revised the Table of Contents to reflect the document changes. 9 Added description of the contents of appendixes D - G. 12 Moved section 4.3.2, Shielded Connectors into Appendix D. Merged section 4.3.1 into section 4.3. 12.1-12.2 \ 17-19 \ Deleted pages 19.1-19.4 / (Information moved to Appendix D). 21.1-21.2 / 20-21 Deleted second line of Table titles. 24 Redrew figures 4-5 through 4-7. 26 Redrew figure 4-9. 37 Clarified that multiple messages may be sent during a message phase. 38 Clarification to the MESSAGE OUT phase error handling. 41 Redrew figures 5-1 and 5-2. 43 Editorial clarification. 49 Deleted "immediately". 50-50.1 Clarified that unit attention condition is on a per logical unit basis. Also clarified "other" command is other than REQUEST SENSE. 65-66 Added ISO version field to the INQUIRY data. 93.1 Revised Table 8-14.1 to reference the latest X3B5 document number and to refer to Appendix F for additional standards. 94-99 Editorial clarifications to the RESERVE and RELEASE commands. 113 Clarified which status codes are to be returned on SEARCH DATA commands. 119 Clarified that READ BLOCK LIMITS returns the target's capability as opposed to its current setting. 132 Added code values 0BH through 0DH to Table 9-14.1. 132.2-133 Editorial clarifications to the RESERVE UNIT and RELEASE UNIT commands. 147-149 Editorial clarifications to the RESERVE UNIT and RELEASE UNIT commands. 174-176.2 Revised Appendix A to make the figure legible. 182-183 Redrew figures C1 and C2. 184-192 Added Appendix D, Recommended Shielded Connectors. Most of this information was previously in section 4.3.2. 193-194 Added Appendix E, Conformance. 195-196 Added Appendix F, Additional Medium Type and Density Code Standards. 197 Appendix G was previously Appendix D. Editorial clarification. FOREWORD (This Foreword is not part of American National Standard X3.131-198_.) The development of comparatively inexpensive VLSI device controllers have recently changed the economics of interfaces for small system storage devices. Where expensive controller logic was once shared among as many devices as possible, in many cases it now makes economic sense to build a controller in each device. This is particularly true for high-performance storage devices, where the intimate interactions of the recording medium, the recording mechanism, and the recording code cause intersymbol interference and error recovery problems that are highly specific to the chosen technologies, and are best resolved within the device itself. Moreover, the number of types of storage devices for small computers, and the industry that builds them, have grown dramatically in the past few years. In particular, the emergence of physically small, but comparatively high-capacity and high-performance fixed-medium magnetic disk devices (virtually non- existent in the late 1970s, but a multibillion dollar business in the mid- 1980s) has driven the development of small computer systems and caused a need for other classes of devices, such as streaming cartridge tape drives, for backup and data interchange. Because device interfaces are very specific to device types, many device level interface standards would be required to service all small computer device types. Because backplane buses reside at the center of computers, and have dramatic performance effects, many different ones are needed for different system requirements. To connect every backplane bus to every device interface through a controller would require an almost unbounded number of specific controller products. In addition, in many systems today, it is not the computer which is "central", it is the storage facility. That is, one or two large capacity storage subsystems serve several computers. An interface adapted to this reality was needed. By 1982, all the needs given above were widely recognized in the industry and by the members of X3T9 and its Task Groups. A commercial small system parallel bus, the Shugart Associates System Interface (SASI), generally met the small system requirements for a device-independent peripheral or system bus and had enjoyed significant market success. It was offered to X3T9.2 as the basis for a standard. X3T9.2 chose the name Small Computer System Interface (SCSI) for that standard and began work at its April 1982 meeting. The present SCSI dpANS is a formalization and extension of the SASI. Many existing SASI devices are SCSI compatible. Since April 1982, X3T9.2 has held plenary sessions, at two month intervals, plus numerous informal working meetings. The original SASI has been extended in a number of ways, including: (1) A differential electrical option has been added to allow use of longer cables (up to 25 meters) in environments where common mode noise is a concern. (2) A synchronous transfer option has been developed allowing maximum transfer rates in the 3 to 4 megabyte per second range. (3) An optional "extended" command set has been added, allowing for very large capacity storage devices (a block address space of 232 blocks versus 221 for SASI), and Inquiry commands that allow self-configuring driver software. (4) Command sets for magnetic tape (both start/stop and streaming), printers, processors, optical disks, and read-only optical disks have been added to the proposed SCSI standard, in addition to those for magnetic disks. Although it might have been premature in April 1982 to claim that SASI was then a de facto standard, this surely is the case for SASI/SCSI today. SCSI compatible host adapters, controllers, and peripheral devices are now widely manufactured around the world. Host adapters are available for most small computers with accessible backplane buses. SCSI controllers are widely available for all the de jure and de facto standard magnetic disk and magnetic tape device interfaces. Small high-capacity fixed-medium magnetic disks, rigid removable-medium magnetic disks, high-capacity Bernoulli-effect flexible disks, and other closed-loop high-capacity flexible disk products, as well as optical disk products, are all available with integral SCSI controllers. SCSI subsystems that integrate both a rigid-disk and a streaming-tape drive into a single package are also available. SCSI interface chips are available, and some disk controller chip sets also provide SCSI support. Since a large number of companies have implemented and tested the SCSI during the development of the proposed standard, no separate test program has been deemed necessary. At the February 1984 meeting of X3T9.2, representatives of the following companies stated, for the record, that their companies had implemented and tested SCSI: Adaptec, Adaptive Data, Data Technology Corp., Fujitsu America, Inc., NCR Corp., and Shugart Corp. This is not a complete list of companies implementing products using SCSI nor is it a promise by these companies to offer SCSI products. The SCSI fills an urgent need, provides for the future, and is consonant with actual commercial practice. Most important, the timing is right. SCSI catches the floodtide of new, high-performance storage devices for small systems, and promises to bring a measure of needed order to what would otherwise be a chaotic and fragmented market. This standard specifies the mechanical, electrical, and functional requirements for a small computer input/output bus interface, and command sets for peripheral device types, particularly storage devices, commonly used with small computers. Suggestions for improvement of this standard will be welcome. They should be sent to the Computer and Business Equipment Manufacturers Association, 311 First Street, NW, Suite 500, Washington, DC 20001. This standard was processed and approved for submittal to ANSI by American National Standards Committee on Computers and Information Processing, X3. Committee approval of the standard does not imply that all committee members voted for its approval. At the time it approved this standard, the X3 Committee had the following members: TO BE DETERMINED Subcommittee X3T9 on I/O interfaces, which reviewed this standard, had the following members: Delbert L. Shoemaker (Chairman) Ron Tranquilli (Vice Chairman) Bob Bender G. Atterbury (Alt) John Blagaila Charles Brill (Alt) Fred Ciechowski William E. Burr (Alt) George Clark Roger Cormier (Alt) Stephen W. Cooper Hank Dorris (Alt) Louis C. Domshy Thomas A. Fiers (Alt) Robert Dugan Henry Ginter (Alt) Ross H. Jaibaji William J. McClain (Alt) Patrick Lannan William Mosenthal, Jr. (Alt) Gene Milligan Kirk Moulton (Alt) Tom Morrow Mike Newton Gary S. Robinson Arnold John Roccati Floyd E. Ross Holly S. White (Note: The name lists on this page and the following page are incomplete and they will be updated upon final approval of this standard.) Task Group X3T9.2 on Lower-Level Interfaces, which developed this standard, had the following members: William E. Burr (Chairman) John B. Lohmeyer (Vice Chairman) Ezra R. Alcudia Keith Amundsen (Alt) J. L. Amstutz Karen Anneberg (Alt) Bob Bender Charles Brill (Alt) John Blagaila Larry Boucher (Alt) Tom Briggs Paul Clement (Alt) David T. Cornaby George E. Clark (Alt) David F. Craft, Jr. Steve Cooper (Alt) Jay Cunningham Gary Crowell (Alt) Willard S. Davidson Jon Ericson (Alt) Terry Dawson Tom Fiers (Alt) Phil Devin Stephen Fitzgerald (Alt) Louis C. Domshy Marty Francis (Alt) Norm Dornseif William Homans (Alt) Alan Ebright J. V. Howell (Alt) Anita Freeman Skip Kilsdonk (Alt) Abe Gindi Jim Korpi (Alt) William A. Horton Lawrence J. Lamers (Alt) Frank Krulc Keith Mueller (Alt) Patrick E. Lannan Don Nanneman (Alt) Daniel Loski Doug Nolff (Alt) William C. Mavity Richard Reiser (Alt) Gene Milligan William H. Roberts (Alt) Bob Mortensen Floyd E. Ross (Alt) Gary S. Robinson D. Michael Robinson (Alt) Don Rodgers Jay Seashore (Alt) Arnold J. Roccati Chuck Spatafore (Alt) Jack Schiffhauer Jeff Stai (Alt) Ralph H. Schultz Paul Stavish (Alt) Moshe Segal Delbert L. Shoemaker Tim Slaton Robert N. Snively Adrienne Turenne Norm Zimmerman T A B L E O F C O N T E N T S 1. Scope...................................................................8 2. Referenced Standard.....................................................9 3. Glossary and Conventions................................................9 3.1 Glossary...........................................................9 3.2 Editorial Conventions.............................................11 4. Physical Characteristics...............................................11 4.1 Physical Description..............................................11 4.2 Cable Requirements................................................11 4.3 Connector Requirements............................................12 4.4 Electrical Description............................................22 4.5 SCSI Bus..........................................................25 4.6 SCSI Bus Signals..................................................27 4.7 SCSI Bus Timing...................................................30 5. Logical Characteristics................................................31 5.1 SCSI Bus Phases...................................................31 5.2 SCSI Bus Conditions...............................................38 5.3 SCSI Bus Phase Sequences..........................................40 5.4 SCSI Pointers.....................................................42 5.5 Message System Specification......................................42 6. SCSI Commands .........................................................49 6.1 Command Implementation Requirements...............................50 6.2 Command Descriptor Block........................................50.1 6.3 Command Examples..................................................55 7. Command Descriptions for All Device Types..............................57 7.1 Group 0 Commands for All Device Types.............................57 7.2 Group 1 Commands for All Device Types.............................76 7.3 Group 2 Commands for All Device Types.............................79 7.4 Group 3 Commands for All Device Types.............................79 7.5 Group 4 Commands for All Device Types.............................79 7.6 Group 5 Commands for All Device Types.............................79 7.7 Group 6 Commands for All Device Types.............................79 7.8 Group 7 Commands for All Device Types.............................79 8. Command Descriptions for Direct-Access Devices.........................80 8.1 Group 0 Commands for Direct-Access Devices........................80 8.2 Group 1 Commands for Direct-Access Devices.......................104 9. Group 0 Command Descriptions for Sequential-Access Devices............117 10. Group 0 Command Descriptions for Printer Devices......................140 11. Group 0 Command Descriptions for Processor Devices....................152 12. Command Descriptions for Write-Once Read-Multiple Devices.............155 12.1 Group 0 Commands for Write-Once Read-Multiple Devices...........155 12.2 Group 1 Commands for Write-Once Read-Multiple Devices...........164 13. Command Descriptions for Read-Only Direct-Access Devices..............170 13.1 Group 0 Commands for Read-Only Direct-Access Devices............170 13.2 Group 1 Commands for Read-Only Direct-Access Devices............171 14. Status ...............................................................172 L I S T O F F I G U R E S 4-1 Nonshielded SCSI Device Connector.....................................13 4-2 Nonshielded Cable Connector...........................................15 4-5 Termination for Single-Ended Devices..................................24 4-6 Termination for Differential Devices..................................24 4-7 Differential Driver Protection Circuit (Optional).....................24 4-8 SCSI ID Bits..........................................................25 4-9 Sample SCSI Configurations............................................26 5-1 Phase Sequences without Arbitration...................................41 5-2 Phase Sequences with Arbitration......................................41 5-3 Simplified SCSI System................................................42 Appendixes Appendix A................................................................174 SCSI Signal Sequence Example Appendix A Figures A1: SCSI Timing Chart ...............................................175 Appendix B................................................................177 Typical Bus Phase Sequence Appendix C................................................................179 SCSI System Operation C1. Host Memory / Host Adapter / SCSI Controller Relationship........179 C2. SCSI READ Command Example........................................180 C3. I/O Channel Concept..............................................181 Appendix C Figures C1: Snapshot Prior to Initial Selection..............................182 C2: Snapshot Prior to Data Transfer..................................183 Appendix D................................................................184 Recommended Shielded Connectors D1. Shielded Connector, Alternative 1................................184 D2. Shielded Connector, Alternative 2................................184 D3. EUROCARD Boxes...................................................184 Appendix D Figures D1: Female Shielded SCSI Cable Connector, Alternative 1..............185 D2: Male Shielded SCSI Device Connector, Alternative 1...............187 D3: Shielded SCSI Device Connector, Alternative 2....................189 D4: Shielded SCSI Cable Connector, Alternative 2.....................190 Appendix E................................................................193 Conformance E1. Alternatives.....................................................193 E2. Levels of Conformance............................................193 E3. Options..........................................................194 E4. Statement of Conformance.........................................194 Appendix F................................................................195 Additional Medium Type and Density Code Standards Appendix G................................................................197 Future Standardization (This page is intentionally blank.) 1. Scope This American National Standard provides the mechanical, electrical, and functional requirements for a small computer input/output bus and command sets for peripheral device types commonly used with small computers. The small computer system interface, described in this standard, is a local I/O bus that can be operated at data rates up to 4 megabytes per second depending upon circuit implementation choices. The primary objective of the interface is to provide host computers with device independence within a class of devices. Thus, different disk drives, tape drives, printers, and even communication devices can be added to the host computer(s) without requiring modifications to generic system hardware or software. Provision is made for the addition of nongeneric features and functions through vendor unique fields and codes. The interface uses logical rather than physical addressing for all data blocks. For direct access devices, each logical unit may be interrogated to determine how many blocks it contains. A logical unit may coincide with all or part of a peripheral device. Provision is made for cable lengths up to 25 meters using differential drivers and receivers. A single-ended driver and receiver configuration is defined for cable lengths of up to 6 meters and is primarily intended for applications within a cabinet. The interface protocol includes provision for the connection of multiple initiators (SCSI devices capable of initiating an operation) and multiple targets (SCSI devices capable of responding to a request to perform an operation). Optional distributed arbitration (i.e., bus-contention logic) is built into the architecture of SCSI. A priority system awards interface control to the highest priority SCSI device that is contending for use of the bus. The time to complete arbitration is independent of the number of devices that are contending and can be completed in less than 10 microseconds. The physical characteristics are described in Section 4. There are two electrical alternatives: single-ended and differential. Single-ended and differential devices are electrically different and shall not be mixed on the same bus. In addition, there are several options: shielded or unshielded connectors may be used and parity may or may not be implemented. Section 5 describes the logical characteristics of the interface. An arbitration option is defined to permit multiple initiators and to permit concurrent I/O operations. All SCSI devices are required to be capable of operating with the defined asynchronous transfer protocol. In addition, an optional synchronous transfer protocol is defined. Section 5 also specifies a message protocol for control of the interface. In most cases, messages are not directly apparent to the host computer software. Only one message, COMMAND COMPLETE, is mandatory; all others are optional and are not necessarily implemented. Note that some options (e.g., synchronous transfer) require the implementation of certain messages. The SCSI command structure is specified in Section 6. Commands are classified as mandatory (M), extended (E), optional (O), or vendor unique (V). SCSI devices shall implement all mandatory commands defined for the appropriate device type and may implement other commands as well. Extended SCSI devices shall implement all extended plus all mandatory commands and may implement other commands as well. Extended SCSI devices contain commands that facilitate the writing of self-configuring software drivers that can "discover" all necessary attributes without prior knowledge of specific peripheral characteristics (such as storage capacity). Extended commands for direct access devices also implement a very large logical block address space (232 blocks), although mandatory commands for direct access devices implement a somewhat smaller logical block address space (221 blocks). Section 7 specifies those commands that have a consistent meaning for all device types. Sections 8 through 13 contain commands for direct-access (e.g., magnetic disk), sequential-access (e.g., magnetic tape), printer, processor, write- once-read-multiple (e.g., optical disk), and read-only direct-access devices, respectively. The commands in each of these sections are unique to the device type, or they have interpretations, fields, or features that are specific for the device type. Thus, for example, although the WRITE command is used for several device types, it has a somewhat different form for each type, with different parameters and meanings. Therefore, it is specified separately for each device type. Section 14 describes the status byte for all device types. Status is returned by targets at the end of each command. Appendixes A through C provide examples of SCSI signal sequences, timing, and phase sequences. Appendix D contains information on recommended shielded connectors. Appendix E contains information on conformance statements. Appendix F contains information on other standards related to medium types and density codes for flexible disks and magnetic tapes. Appendix G contains information on future extensions to SCSI that are being considered by X3T9.2 However, the appendixes are not part of this standard. 2. Referenced Standard This standard is intended for use in conjunction with EIA RS-485-1983, Standard for Electrical Characteristics of Generators and Receivers for use in Balanced Digital Multipoint Systems.1 3. Glossary and Conventions 3.1 Glossary byte. In this standard, this term indicates an 8-bit (octet) byte. command descriptor block (CDB). The structure used to communicate requests from an initiator to a target. connect. The function that occurs when an initiator selects a target to start an operation. ____________ 1 Available from the Electronic Industries Association, 2001 Eye Street NW, Washington, D.C. 20006. disconnect. The function that occurs when a target releases control of the SCSI bus, allowing it to go to the BUS FREE phase. initiator. An SCSI device (usually a host system) that requests an operation to be performed by another SCSI device. INTERMEDIATE status. A status code sent from a target to an initiator upon completion of each command in a set of linked commands except the last command in the set. logical unit. A physical or virtual device addressable through a target. logical unit number. An encoded three-bit identifier for the logical unit. LSB. Least significant byte. LUN. Logical unit number. mm. Millimeter. ms. Millisecond. MSB. Most significant byte. ns. Nanosecond. one. A true signal value. peripheral device. A peripheral that can be attached to an SCSI device (e.g., magnetic-disk, printer, optical-disk, or magnetic-tape). reconnect. The function that occurs when a target selects an initiator to continue an operation after a disconnect. reserved. The term used for bits, bytes, fields, and code values that are set aside for future standardization. SCSI address. The octal representation of the unique address (0-7) assigned to an SCSI device. This address would normally be assigned and set in the SCSI device during system installation. SCSI ID. The bit-significant representation of the SCSI address referring to one of the signal lines DB(7-0). SCSI device. A host computer adapter or a peripheral controller or an intelligent peripheral that can be attached to the SCSI bus. signal assertion. The act of driving a signal to the true state. signal negation. The act of driving a signal to the false state or allowing the cable terminators to bias the signal to the false state (by placing the driver in the high impedance condition). signal release. The act of allowing the cable terminators to bias the signal to the false state (by placing the driver in the high impedance condition). status. One byte of information sent from a target to an initiator upon completion of each command. target. An SCSI device that performs an operation requested by an initiator. us. Microsecond. vendor unique. In this standard, this term indicates bits, fields, or code values that are vendor specific. xxH. Numbers followed by capital H subscript are hexadecimal values. All other numbers are decimal values. zero. A false signal value. 3.2 Editorial Conventions. Certain words and terms used in this standard have a specific meaning beyond the normal English meaning. These words and terms are defined either in the glossary (see 3.1) or in the text where they first appear (e.g., initiator). Names of signals, phases, conditions, messages, commands, statuses, and sense keys are in all uppercase (e.g., REQUEST SENSE). Lowercase is used for words having the normal English meaning. 4. Physical Characteristics This section contains the physical definition of the SCSI. The connectors, cables, signals, terminators, and bus timing needed to implement SCSI are covered. 4.1 Physical Description. SCSI devices are daisy-chained together using a common cable. Both ends of the cable are terminated. All signals are common between all SCSI devices. Two driver/receiver alternatives are available: (1) Single-ended drivers and receivers, which allow a maximum cable length of six meters (primarily for connection within a cabinet) (2) Differential drivers and receivers, which allow a maximum cable length of 25 meters (primarily for connection outside of a cabinet) 4.2 Cable Requirements. An ideal impedance match with cable terminators implies a cable characteristic impedance of 132 ohms (singled-ended option) or 122 ohms (differential option). In general, cables with this high of a characteristic impedance are not available; however, impedances that are somewhat lower are satisfactory. A characteristic impedance of 100 ohms + 10% is recommended for unshielded flat or twisted pair ribbon cable. A characteristic impedance greater than 90 ohms is preferred for shielded cables; however, most available cables have a somewhat lower characteristic impedance. To minimize discontinuities and signal reflections, cables of different impedances should not be used in the same bus. Implementations may require trade-offs in shielding effectiveness, cable length, the number of loads, transfer rates, and cost to achieve satisfactory system operation. A minimum conductor size of 28 AWG shall be employed to minimize noise effects and ensure proper distribution of optional terminator power. 4.2.1 Single-Ended Cable. A 50-conductor flat cable or 25-signal twisted- pair cable shall be used. The maximum cable length shall be 6.0 meters. A stub length of no more than 0.1 meters is allowed off the mainline interconnection within any connected equipment. SCSI bus termination may be internal to the SCSI devices that are at the ends of the cable. 4.2.2 Differential Cable. A 50-conductor cable or 25-signal twisted-pair cable shall be used. The maximum cable length shall be 25 meters. A stub length of no more than 0.2 meters is allowed off the mainline interconnection within any connected equipment. SCSI bus termination may be internal to the SCSI devices that are at the ends of the cable. 4.3 Connector Requirements. Nonshielded connectors are specified. The nonshielded connectors are typically used for in-cabinet applications. Appendix D defines recommended shielded connectors and their pin assignments. These connectors are typically used for external applications where electromagnetic compatibility (EMC) and electrostatic discharge (ESD) protection may be required. Either type of connector may be used with the single-ended or differential drivers. The nonshielded SCSI device connector (Figure 4-1) shall be a 50-conductor connector consisting of two rows of 25 male pins with adjacent pins 2.54 mm (0.1 in) apart. A shroud and header body should be used. The nonmating portion of the connector is shown for reference only. The nonshielded cable connector (Figure 4-2) shall be a 50-conductor connector consisting of two rows of 25 female contacts with adjacent contacts 2.54 mm (0.1 in) apart. It is recommended that keyed connectors be used. The unshielded connector pin assignments shall be as shown in Table 4-1 for single-ended drivers and as shown in Table 4-2 for differential drivers. Figure 4-1a. Nonshielded SCSI Device Connector ============================================================================== Dimensions Millimeters Inches ------------------------------------------------------------------------------ D1 2.54 0.100 D2* 82.80 3.260 D3 2.54 0.100 D4 4.83 0.190 D5* 8.51 0.335 D6* 72.64 2.860 D7* 78.74 3.100 D8* 13.94 0.549 D9 4.19 0.165 D10 6.09 0.240 D11 6.60 0.260 ============================================================================== NOTES: (1) Fifty Contacts on 2.54-mm (0.100-inch) spacing = 60.96 mm (2.40 inch). (2) Tolerances + 0.127 mm (0.005 inch) noncumulative. (3) Dimensions listed with asterisks (*) are shown for reference only. Figure 4-1b. Nonshielded SCSI Device Connector (Editors note: Figures 4-1a and 4-1b are to be combined into a single figure during the final editing.) Figure 4-2a. Nonshielded Cable Connector ============================================================================== Dimensions Millimeters Inches ------------------------------------------------------------------------------ C1 2.5400 0.100 C2 60.9600 2.400 C3 2.5400 0.100 C4 8.3570 0.329 C5 3.3025 0.130 C6 68.0720 2.680 C7 6.0960 0.240 C8* 8.1530 0.321 C9* 13.4870 0.531 C10* 3.8100 0.150 C11* 1.2700 0.050 C12* 6.0960 0.240 C13 32.3850 1.275 C14 3.3020 0.130 C15 7.4930 0.295 C16 2.6670 0.105 C17 1.6250 0.064 ============================================================================== NOTES: (1) Fifty contacts on 1.27-mm (0.05-inch)* staggered spacing = 62.23 mm (2.450 inch)*. (2) Tolerances + 0.127 mm (0.005 inch) noncumulative. (3) Dimensions listed with asterisks (*) are shown for reference only. Figure 4-2b. Nonshielded Cable Connector (Editors note: Figures 4-2a and 4-2b are to be combined into a single figure during the final editing.) (Pages 17-19 and 19.1-19.4 are deleted. The information previously contained on these pages has been moved to Appendix D.) Table 4-1 Single-Ended Pin Assignments ============================================================================== Signal Pin Number ------------------------------------------------------------------------------ -DB(0) 2 -DB(1) 4 -DB(2) 6 -DB(3) 8 -DB(4) 10 -DB(5) 12 -DB(6) 14 -DB(7) 16 -DB(P) 18 GROUND 20 GROUND 22 GROUND 24 TERMPWR 26 GROUND 28 GROUND 30 -ATN 32 GROUND 34 -BSY 36 -ACK 38 -RST 40 -MSG 42 -SEL 44 -C/D 46 -REQ 48 -I/O 50 ============================================================================== NOTES: (1) All odd pins except pin 25 shall be connected to ground. Pin 25 should be left open. Some products designed prior to the generation of this standard connected this pin to ground. (2) The minus sign next to the signals indicates active low. Table 4-2 Differential Pin Assignments ============================================================================== Signal Name Pin Number Signal Name ------------------------------------------------------------------------------ SHIELD GROUND 1 2 GROUND +DB(0) 3 4 -DB(0) +DB(1) 5 6 -DB(1) +DB(2) 7 8 -DB(2) +DB(3) 9 10 -DB(3) +DB(4) 11 12 -DB(4) +DB(5) 13 14 -DB(5) +DB(6) 15 16 -DB(6) +DB(7) 17 18 -DB(7) +DB(P) 19 20 -DB(P) DIFFSENS 21 22 GROUND GROUND 23 24 GROUND TERMPWR 25 26 TERMPWR GROUND 27 28 GROUND +ATN 29 30 -ATN GROUND 31 32 GROUND +BSY 33 34 -BSY +ACK 35 36 -ACK +RST 37 38 -RST +MSG 39 40 -MSG +SEL 41 42 -SEL +C/D 43 44 -C/D +REQ 45 46 -REQ +I/O 47 48 -I/O GROUND 49 50 GROUND ============================================================================== NOTE: (1) SHIELD GROUND is optional on some cables. (Implementors note: Some shielded flat ribbon cables use pin 1 as a connection to the shield.) 4.4 Electrical Description NOTE: For these measurements, SCSI bus termination is assumed to be external to the SCSI device. An SCSI device may have the provision for allowing optional internal termination. 4.4.1 Single-Ended Alternative. All assigned signals shall be terminated with 220 ohms to +5 volts (nominal) and 330 ohms to ground at each end of the cable. (See Figure 4-5.) All signals shall use open-collector or three-state drivers. 4.4.1.1 Output Characteristics. Each signal driven by an SCSI device shall have the following output characteristics when measured at the SCSI device's connector: Signal assertion = 0.0 volts dc to 0.4 volts dc Minimum driver output capability = 48 milliamps (sinking) at 0.5 volts dc Signal negation = 2.5 volts dc to 5.25 volts dc 4.4.1.2 Input Characteristics. Each signal received by an SCSI device shall have the following input characteristics when measured at the SCSI device's connector: Signal true = 0.0 volts dc to 0.8 volts dc Maximum total input load = -0.4 milliamps at 0.4 volts dc Signal false = 2.0 volts dc to 5.25 volts dc Minimum input hysteresis = 0.2 volts dc 4.4.2 Differential Alternative. All signals consist of two lines denoted +SIGNAL and -SIGNAL. A signal is true when +SIGNAL is more positive than -SIGNAL, and a signal is false when -SIGNAL is more positive than +SIGNAL. All assigned signals shall be terminated at each end of the cable as shown in Figure 4-6. NOTE: As an option, the DIFFSENS signal of the connector is reserved for an active high enable for the differential drivers. If a single-ended device or terminator is inadvertently connected, this signal is grounded, disabling the drivers. (See Figure 4-7.) 4.4.2.1 Output Characteristics. Each signal driven by an SCSI device shall have the following output characteristics when measured at the SCSI device's connector: VOL (Low-level output voltage) = 2.0 V maximum at IOL (Low-level output current) = 55 milliamps. VOH (High-level output voltage) = 3.0 V minimum at IOH (High-level output current) = -55 milliamps. VOD (Differential voltage) = 1.0 V minimum with common-mode voltage ranges from -7 volts dc to +12 volts dc. VOL and VOH shall be as measured between the output terminal and the SCSI device's logic ground reference. The output characteristics shall additionally conform to EIA RS-485-1983. 4.4.2.2 Input Characteristics. Each signal received by an SCSI device shall have the following input characteristics when measured at the SCSI device's connector: II (Input current on either input) = + 2.0 milliamps maximum. NOTE: These characteristics include both receivers and passive drivers. This requirement shall be met with the input voltage varying between -7 volts dc and +12 volts dc, with power on or off, and with the hysteresis equaling 35 millivolts, minimum. The input characteristics shall additionally conform to EIA RS-485-1983. 4.4.3 Terminator Power (Optional). Single-ended SCSI devices providing terminator power (TERMPWR) shall have the following characteristics: VTerm = 4.0 volts dc to 5.25 volts dc 800 milliamps minimum source drive capability 1.0 milliamp maximum sink capability (except for the purposes of providing power to an internal terminator) with 1.0 amp recommended current limiting (e.g., a fuse). Differential SCSI devices providing terminator power (TERMPWR) shall have the following characteristics: VTerm = 4.0 volts dc to 5.25 volts dc 600 milliamps minimum source drive capability 1.0 milliamp maximum sink capability (except for the purposes of providing power to an internal terminator) with 1.0 amp recommended current limiting (e.g., a fuse). The use of keyed connectors is recommended in SCSI devices that provide terminator power to prevent accidental grounding or misconnection of terminator power. SCSI devices that supply terminator power shall do so through a diode or similar semiconductor that prevents the backflow of power to the SCSI device. Figure 4-5. Termination for Single-Ended Devices Figure 4-6. Termination for Differential Devices Figure 4-7. Differential Driver Protection Circuit (Optional) 4.5 SCSI Bus. Communication on the SCSI bus is allowed between only two SCSI devices at any given time. There is a maximum of eight SCSI devices. Each SCSI device has an SCSI ID bit assigned as shown in Figure 4-8. When two SCSI devices communicate on the SCSI bus, one acts as an initiator and the other acts as a target. The initiator originates an operation and the target performs the operation. An SCSI device usually has a fixed role as an initiator or target, but some devices may be able to assume either role. An initiator may address up to eight peripheral devices that are connected to a target. An option allows the addressing of up to 2,048 peripheral devices per target using extended messages. Three sample system configurations are shown in Figure 4-9. DB(7) DB(6) DB(5) DB(4) DB(3) DB(2) DB(1) DB(0) <-- DATA BUS | | | | | | | | | | | | | | | SCSI ID = 0 | | | | | | | | | | | | | SCSI ID = 1 | | | | | | | | | | | SCSI ID = 2 | | | | | | | | | SCSI ID = 3 | | | | | | | SCSI ID = 4 | | | | | SCSI ID = 5 | | | SCSI ID = 6 | SCSI ID = 7 Figure 4-8. SCSI ID Bits Figure 4-9. Sample SCSI Configurations Up to eight SCSI devices can be supported on the SCSI bus. They can be any combination of initiators and targets. Certain SCSI bus functions are assigned to the initiator and certain SCSI bus functions are assigned to the target. The initiator may arbitrate for the SCSI bus and select a particular target. The target may request the transfer of COMMAND, DATA, STATUS, or other information on the DATA BUS, and in some cases it may arbitrate for the SCSI bus and reselect an initiator for the purpose of continuing an operation. Information transfers on the DATA BUS are asynchronous and follow a defined REQ/ACK handshake protocol. One byte of information may be transferred with each handshake. An option is defined for synchronous data transfer. 4.6 SCSI Bus Signals. There are a total of eighteen signals. Nine are used for control and nine are used for data. (Data signals include the parity signal option). These signals are described as follows: BSY (BUSY). An "OR-tied" signal that indicates that the bus is being used. SEL (SELECT). A signal used by an initiator to select a target or by a target to reselect an initiator. C/D (CONTROL/DATA). A signal driven by a target that indicates whether CONTROL or DATA information is on the DATA BUS. True indicates CONTROL. I/O (INPUT/OUTPUT). A signal driven by a target that controls the direction of data movement on the DATA BUS with respect to an initiator. True indicates input to the initiator. This signal is also used to distinguish between SELECTION and RESELECTION phases. MSG (MESSAGE). A signal driven by a target during the MESSAGE phase. REQ (REQUEST). A signal driven by a target to indicate a request for a REQ/ACK data transfer handshake. ACK (ACKNOWLEDGE). A signal driven by an initiator to indicate an acknowledgment for a REQ/ACK data transfer handshake. ATN (ATTENTION). A signal driven by an initiator to indicate the ATTENTION condition. RST (RESET). An "OR-tied" signal that indicates the RESET condition. DB(7-0,P) (DATA BUS). Eight data-bit signals, plus a parity-bit signal that form a DATA BUS. DB(7) is the most significant bit and has the highest priority during the ARBITRATION phase. Bit number, significance, and priority decrease downward to DB(0). A data bit is defined as one when the signal value is true and is defined as zero when the signal value is false. Data parity DB(P) is odd. The use of parity is a system option (i.e., a system is configured so that all SCSI devices on a bus generate parity and have parity detection enabled, or all SCSI devices have parity detection disabled or not implemented). Parity is not valid during the ARBITRATION phase. 4.6.1 Signal Values. Signals may assume true or false values. There are two methods of driving these signals. In both cases, the signal shall be actively driven true, or asserted. In the case of OR-tied drivers, the driver does not drive the signal to the false state, rather the bias circuitry of the bus terminators pulls the signal false whenever it is released by the drivers at every SCSI device. If any driver is asserted, then the signal is true. In the case of non-OR-tied drivers, the signal may be actively driven false, or negated. In this standard, wherever the term negated is used, it means that the signal may be actively driven false, or may be simply released (in which case the bias circuitry pulls it false), at the option of the implementor. The advantage to actively drive signals false is that the transition from true to false occurs more quickly, and noise margins may be somewhat improved; this may permit somewhat faster data transfer. 4.6.2 OR-Tied Signals. The BSY and RST signals shall be OR-tied only. In the ordinary operation of the bus, these signals are simultaneously driven true by several drivers. No signals other than BSY, RST, and DB(P) are simultaneously driven by two or more drivers, and any signal other than BSY and RST may employ OR-tied or non-OR-tied drivers. DB(P) shall not be driven false during the ARBITRATION phase. There is no operational problem in mixing OR-tied and non-OR-tied drivers on signals other than BSY and RST. 4.6.3 Signal Sources. Table 4-3 indicates which type of SCSI device is allowed to source each signal. No attempt is made to show if the source is driving asserted, driving negated, or is passive. All SCSI device drivers that are not active sources shall be in the passive state. Note that the RST signal may be sourced by any SCSI device at any time. Table 4-3 Signal Sources ============================================================================== Signals ---------------------------------------------------------- C/D, I/O, Bus Phase BSY SEL MSG, REQ ACK/ATN DB(7-0,P) ------------------------------------------------------------------------------ BUS FREE None None None None None ARBITRATION All Winner None None SCSI ID SELECTION I&T Initiator None Initiator Initiator RESELECTION I&T Target Target Initiator Target COMMAND Target None Target Initiator Initiator DATA IN Target None Target Initiator Target DATA OUT Target None Target Initiator Initiator STATUS Target None Target Initiator Target MESSAGE IN Target None Target Initiator Target MESSAGE OUT Target None Target Initiator Initiator ============================================================================== All: The signal shall be driven by all SCSI devices that are actively arbitrating. SCSI ID: A unique data bit (the SCSI ID) shall be driven by each SCSI device that is actively arbitrating; the other seven data bits shall be released (i.e., not driven) by this SCSI device. The parity bit (DB(P)) may be undriven or driven to the true state, but shall never be driven to the false state during this phase. I&T: The signal shall be driven by the initiator, target, or both, as specified in the SELECTION phase and RESELECTION phase. Initiator: If this signal is driven, it shall be driven only by the active initiator. None: The signal shall be released; that is, not be driven by any SCSI device. The bias circuitry of the bus terminators pulls the signal to the false state. Winner: The signal shall be driven by the one SCSI device that wins arbitration. Target: If the signal is driven, it shall be driven only by the active target. 4.7 SCSI Bus Timing. Unless otherwise indicated, the delay-time measurements for each SCSI device, shown in 4.7.1 through 4.7.14, shall be calculated from signal conditions existing at that SCSI device's own SCSI bus connection. Thus, these measurements (except cable skew delay) can be made without considering delays in the cable. 4.7.1 Arbitration Delay (2.2 microseconds). The minimum time an SCSI device shall wait from asserting BSY for arbitration until the DATA BUS can be examined to see if arbitration has been won. There is no maximum time. 4.7.2 Assertion Period (90 nanoseconds). The minimum time that a target shall assert REQ while using synchronous data transfers. Also, the minimum time that an initiator shall assert ACK while using synchronous data transfers. 4.7.3 Bus Clear Delay (800 nanoseconds). The maximum time for an SCSI device to stop driving all bus signals after: (1) The BUS FREE phase is detected (BSY and SEL both false for a bus settle delay) (2) SEL is received from another SCSI device during the ARBITRATION phase (3) The transition of RST to true. NOTE: For the first condition above, the maximum time for an SCSI device to clear the bus is 1200 nanoseconds from BSY and SEL first becoming both false. If an SCSI device requires more than a bus settle delay to detect BUS FREE phase, it shall clear the bus within a bus clear delay minus the excess time. 4.7.4 Bus Free Delay (800 nanoseconds). The minimum time that an SCSI device shall wait from its detection of the BUS FREE phase (BSY and SEL both false for a bus settle delay) until its assertion of BSY when going to the ARBITRATION phase. 4.7.5 Bus Set Delay (1.8 microseconds). The maximum time for an SCSI device to assert BSY and its SCSI ID bit on the DATA BUS after it detects BUS FREE phase (BSY and SEL both false for a bus settle delay) for the purpose of entering the ARBITRATION phase. 4.7.6 Bus Settle Delay (400 nanoseconds). The time to wait for the bus to settle after changing certain control signals as called out in the protocol definitions. 4.7.7 Cable Skew Delay (10 nanoseconds). The maximum difference in propagation time allowed between any two SCSI bus signals when measured between any two SCSI devices. 4.7.8 Data Release Delay (400 nanoseconds). The maximum time for an initiator to release the DATA BUS signals following the transition of the I/O signal from false to true. 4.7.9 Deskew Delay (45 nanoseconds). The minimum time required for deskew of certain signals. 4.7.10 Hold Time (45 nanoseconds). The minimum time added between the assertion of REQ or ACK and the changing of the data lines to provide hold time in the initiator or target, respectively, while using synchronous data transfers. 4.7.11 Negation Period (90 nanoseconds). The minimum time that a target shall negate REQ while using synchronous data transfers. Also, the minimum time that an initiator shall negate ACK while using synchronous data transfers. 4.7.12 Reset Hold Time (25 microseconds). The minimum time for which RST is asserted. There is no maximum time. 4.7.13 Selection Abort Time (200 microseconds). The maximum time that a target (or initiator) shall take from its most recent detection of being selected (or reselected) until asserting a BSY response. This timeout is required to ensure that a target (or initiator) does not assert BSY after a SELECTION (or RESELECTION) phase has been aborted. This is not the selection timeout period; see Sections 5.1.3.5 and 5.1.4.2 for a complete description. 4.7.14 Selection Timeout Delay (250 milliseconds, recommended). The minimum time that an initiator (or target) should wait for a BSY response during the SELECTION (or RESELECTION) phase before starting the timeout procedure. Note that this is only a recommended time period. The specifications for the peripheral devices shall be consulted for the actual timing requirements. 4.7.15 Transfer Period (set during a MESSAGE phase). The Transfer Period specifies the minimum time allowed between the leading edges of successive REQ pulses and of successive ACK pulses while using synchronous data transfers. (See Sections 5.1.5.2 and 5.5.5.) 5. Logical Characteristics 5.1 SCSI Bus Phases. The SCSI architecture includes eight distinct phases: BUS FREE phase ARBITRATION phase SELECTION phase RESELECTION phase COMMAND phase \ DATA phase \ These phases are collectively termed the STATUS phase / information transfer phases. MESSAGE phase / The SCSI bus can never be in more than one phase at any given time. Unless otherwise noted in the following descriptions, signals that are not mentioned shall not be asserted. 5.1.1 BUS FREE Phase. The BUS FREE phase is used to indicate that no SCSI device is actively using the SCSI bus and that it is available for subsequent users. SCSI devices shall detect the BUS FREE phase after SEL and BSY are both false for at least a bus settle delay. SCSI devices shall release all SCSI bus signals within a bus clear delay after BSY and SEL become continuously false for a bus settle delay. If an SCSI device requires more than a bus settle delay to detect the BUS FREE phase then it shall release all SCSI bus signals within a bus clear delay minus the excess time to detect the BUS FREE phase. The total time to clear the SCSI bus shall not exceed a bus settle delay plus a bus clear delay. 5.1.2 ARBITRATION Phase. The ARBITRATION phase allows one SCSI device to gain control of the SCSI bus so that it can assume the role of an initiator or target. NOTE: Implementation of the ARBITRATION phase is a system option. Systems that do not implement this option can have only one initiator. The ARBITRATION phase is required for systems that use the RESELECTION phase. The procedure for an SCSI device to obtain control of the SCSI bus is as follows: (1) The SCSI device shall first wait for the BUS FREE phase to occur. The BUS FREE phase is detected whenever both BSY and SEL are simultaneously and continuously false for a minimum of a bus settle delay. (Implementors Note: This bus settle delay is necessary because a transmission line phenomenon known as a "wire-OR glitch" may cause BSY to briefly appear false, even though it is being driven true.) (2) The SCSI device shall wait a minimum of a bus free delay after detection of the BUS FREE phase (i.e. after BSY and SEL are both false for a bus settle delay) before driving any signal. (3) Following the bus free delay in Step (2), the SCSI device may arbitrate for the SCSI bus by asserting both BSY and its own SCSI ID, however the SCSI device shall not arbitrate (i.e. assert BSY and its SCSI ID) if more than a bus set delay has passed since the BUS FREE phase was last observed. (Implementors Note: There is no maximum delay before asserting BSY and the SCSI ID following the bus free delay in Step (2) as long as the bus remains in the BUS FREE phase. However, SCSI devices that delay longer than a bus settle delay plus a bus set delay from the time when BSY and SEL first become false may fail to participate in arbitration when competing with faster SCSI devices.) (4) After waiting at least an arbitration delay (measured from its assertion of BSY) the SCSI device shall examine the DATA BUS. If a higher priority SCSI ID bit is true on the DATA BUS (DB(7) is the highest), then the SCSI device has lost the arbitration and the SCSI device may release its signals and return to Step (1). If no higher priority SCSI ID bit is true on the DATA BUS, then the SCSI device has won the arbitration and it shall assert SEL. Any other SCSI device that is participating in the ARBITRATION phase has lost the arbitration and shall release BSY and its SCSI ID bit within a bus clear delay after SEL becomes true. An SCSI device that loses arbitration may return to Step (1). (5) The SCSI device that wins arbitration shall wait at least a bus clear delay plus a bus settle delay after asserting SEL before changing any signals. NOTE: The SCSI ID bit is a single bit on the DATA BUS that corresponds to the SCSI device's unique SCSI address. All other seven DATA BUS bits shall be released by the SCSI device. Parity is not valid during the ARBITRATION phase. During the ARBITRATION phase, DB(P) may be undriven or driven to the true state, but shall not be driven to the false state. 5.1.3 SELECTION Phase. The SELECTION phase allows an initiator to select a target for the purpose of initiating some target function (e.g., READ or WRITE command). NOTE: During the SELECTION phase the I/O signal shall be negated so that this phase can be distinguished from the RESELECTION phase. 5.1.3.1 Nonarbitrating Systems. In systems with the ARBITRATION phase not implemented, the initiator shall first detect the BUS FREE phase and then wait a minimum of a bus clear delay. Then, except in certain single initiator environments with initiators employing the single initiator option (see 5.1.3.4), the initiator shall assert the desired target's SCSI ID and its own initiator SCSI ID on the DATA BUS. After two deskew delays the initiator shall assert SEL. 5.1.3.2 Arbitrating Systems. In systems with ARBITRATION phase implemented, the SCSI device that won the arbitration has both BSY and SEL asserted and has delayed at least a bus clear delay plus a bus settle delay before ending the ARBITRATION phase. The SCSI device that won the arbitration becomes an initiator by releasing I/O. Except in certain single initiator environments with initiators employing the single initiator option (see 5.1.3.4), the initiator shall set the DATA BUS to a value which is the OR of its SCSI ID bit and the target's SCSI ID bit. The initiator shall then wait at least two deskew delays and release BSY. The initiator shall then wait at least a bus settle delay before looking for a response from the target. 5.1.3.3 All Systems. In all systems, the target shall determine that it is selected when SEL and its SCSI ID bit are true and BSY and I/O are false for at least a bus settle delay. The selected target may examine the DATA BUS in order to determine the SCSI ID of the selecting initiator unless the initiator employed the single initiator option (see 5.1.3.4). The selected target shall then assert BSY within a selection abort time of its most recent detection of being selected; this is required for correct operation of the timeout procedure. In systems with parity implemented, the target shall not respond to a selection if bad parity is detected. Also, if more than two SCSI ID bits are on the DATA BUS, the target shall not respond to selection. At least two deskew delays after the initiator detects BSY is true, it shall release SEL and may change the DATA BUS. 5.1.3.4 Single Initiator Option. Initiators that do not implement the RESELECTION phase and do not operate in the multiple initiator environment are allowed to set only the target's SCSI ID bit during the SELECTION phase. This makes it impossible for the target to determine the initiator's SCSI ID. 5.1.3.5 Selection Timeout Procedure. Two optional selection timeout procedures are specified for clearing the SCSI bus if the initiator waits a minimum of a selection timeout delay and there has been no BSY response from the target: (1) Optionally, the initiator shall assert the RST signal (see 5.2.2). (2) Optionally, the initiator shall continue asserting SEL and shall release the DATA BUS. If the initiator has not detected BSY to be true after at least a selection abort time plus two deskew delays, the initiator shall release SEL allowing the SCSI bus to go to the BUS FREE phase. SCSI devices shall ensure that when responding to selection that the selection was still valid within a selection abort time of their assertion of BSY. Failure to comply with this requirement could result in an improper selection (two targets connected to the same initiator, wrong target connected to an initiator, or a target connected to no initiator). 5.1.4 RESELECTION Phase (Optional). RESELECTION is an optional phase that allows a target to reconnect to an initiator for the purpose of continuing some operation that was previously started by the initiator but was suspended by the target, (i.e., the target disconnected by allowing a BUS FREE phase to occur before the operation was complete). 5.1.4.1 RESELECTION. RESELECTION can only be used in systems that have ARBITRATION phase implemented. Upon completing the ARBITRATION phase, the winning SCSI device has both BSY and SEL asserted and has delayed at least a bus clear delay plus a bus settle delay. The winning SCSI device becomes a target by asserting the I/O signal. The winning SCSI device shall also set the DATA BUS to a value that is the OR of its SCSI ID bit and the initiator's SCSI ID bit. The target shall wait at least two deskew delays and release BSY. The target shall then wait at least a bus settle delay before looking for a response from the initiator. The initiator shall determine that it is reselected when SEL, I/O, and its SCSI ID bit are true and BSY is false for at least a bus settle delay. The reselected initiator may examine the DATA BUS in order to determine the SCSI ID of the reselecting target. The reselected initiator shall then assert BSY within a selection abort time of its most recent detection of being reselected; this is required for correct operation of the timeout procedure. In systems with parity implemented, the initiator shall not respond to a RESELECTION if bad parity is detected. Also, the initiator shall not respond to a RESELECTION if more than two SCSI ID bits are on the DATA BUS. After the target detects BSY, it shall also assert BSY and wait at least two deskew delays and then release SEL. The target may then change the I/O signal and the DATA BUS. After the reselected initiator detects SEL false, it shall release BSY. The target shall continue asserting BSY until the target is ready to relinquish the SCSI bus. NOTE: When the target is asserting BSY, a transmission line phenomenon known as a "wire-OR glitch" may cause BSY to appear false for up to a round-trip propagation delay following the release of BSY by the initiator. This is the reason why the BUS FREE phase is recognized only after both BSY and SEL are continuously false for a minimum of a bus settle delay. Cables longer than 25 meters should not be used even if the chosen driver, receiver, and cable provide adequate noise margins, because they increase the duration of the glitch and could cause SCSI devices to inadvertently detect the BUS FREE phase. 5.1.4.2 RESELECTION Timeout Procedure. Two optional RESELECTION timeout procedures are specified for clearing the SCSI bus during a RESELECTION phase if the target waits a minimum of a selection timeout period and there has been no BSY response from the initiator: (1) Optionally, the target shall assert the RST signal (see 5.2.2). (2) Optionally, the target shall continue asserting SEL and I/O and shall release all DATA BUS signals. If the target has not detected BSY to be true after at least a selection abort time plus two deskew delays, the target shall release SEL and I/O allowing the SCSI bus to go to the BUS FREE phase. SCSI devices that respond to RESELECTION shall ensure that the RESELECTION was still valid within a selection abort time of their assertion of BSY. Failure to comply with this requirement could result in an improper reselection (two initiators connected to the same target or the wrong initiator connected to a target). 5.1.5 Information Transfer Phases. NOTE: The COMMAND, DATA, STATUS, and MESSAGE phases are all grouped together as the information transfer phases because they are all used to transfer data or control information via the DATA BUS. The actual contents of the information is beyond the scope of this section. The C/D, I/O, and MSG signals are used to distinguish between the different information transfer phases. (See Table 5-1.) The target drives these three signals and therefore controls all changes from one phase to another. The initiator can request a MESSAGE OUT phase by asserting ATN, while the target can cause the BUS FREE phase by releasing MSG, C/D, I/O, and BSY. Table 5-1 Information Transfer Phases ============================================================================== Signal ----------- MSG C/D I/O Phase Name Direction Of Transfer Comment ------------------------------------------------------------------------------ 0 0 0 DATA OUT Initiator to target \ Data 0 0 1 DATA IN Initiator from target / Phase 0 1 0 COMMAND Initiator to target 0 1 1 STATUS Initiator from target 1 0 0 * 1 0 1 * 1 1 0 MESSAGE OUT Initiator to target \ Message 1 1 1 MESSAGE IN Initiator from target / Phase ============================================================================== Key: 0 = False, 1 = True, * = Reserved for future standardization. The information transfer phases use one or more REQ/ACK handshakes to control the information transfer. Each REQ/ACK handshake allows the transfer of one byte of information. During the information transfer phases BSY shall remain true and SEL shall remain false. Additionally, during the information transfer phases, the target shall continuously envelope the REQ/ACK handshake(s) with C/D, I/O, and MSG in such a manner that these control signals are valid for a bus settle delay before the assertion of REQ of the first handshake and remain valid until the negation of ACK at the end of the last handshake. 5.1.5.1 Asynchronous Information Transfer. The target shall control the direction of information transfer by means of the I/O signal. When I/O is true, information shall be transferred from the target to the initiator. When I/O is false, information shall be transferred from the initiator to the target. If I/O is true (transfer to the initiator), the target shall first drive DB(7-0,P) to their desired values, delay at least one deskew delay plus a cable skew delay, then assert REQ. DB(7-0,P) shall remain valid until ACK is true at the target. The initiator shall read DB(7-0,P) after REQ is true, then signal its acceptance of the data by asserting ACK. When ACK becomes true at the target, the target may change or release DB(7-0,P) and shall negate REQ. After REQ is false the initiator shall then negate ACK. After ACK is false the target may continue the transfer by driving DB(7-0,P) and asserting REQ, as described above. If I/O is false (transfer to the target) the target shall request information by asserting REQ. The initiator shall drive DB(7-0,P) to their desired values, delay at least one deskew delay plus a cable skew delay and assert ACK. The initiator shall continue to drive DB(7-0,P) until REQ is false. When ACK becomes true at the target, the target shall read DB(7-0,P), then negate REQ. When REQ becomes false at the initiator, the initiator may change or release DB(7-0,P) and shall negate ACK. The target may continue the transfer by asserting REQ, as described above. 5.1.5.2 Synchronous Data Transfer (Optional). Synchronous data transfer is optional, and may be used only in the data phase if previously agreed to by the initiator and target through the message system (see SYNCHRONOUS DATA TRANSFER REQUEST message, 5.5.5). The messages determine the use of synchronous mode by both SCSI devices and establish a REQ/ACK offset and a transfer period. The REQ/ACK offset specifies the maximum number of REQ pulses that can be sent by the target in advance of the number of ACK pulses received from the initiator, establishing a pacing mechanism. If the number of REQ pulses exceeds the number of ACK pulses by the REQ/ACK offset, the target shall not assert REQ until the next ACK pulse is received. A requirement for successful completion of the data phase is that the number of ACK and REQ pulses be equal. The target shall assert the REQ signal for a minimum of an assertion period. The target shall wait at least the greater of a transfer period from the last transition of REQ to true or a minimum of a negation period from the last transition of REQ to false before asserting the REQ signal. The initiator shall send one pulse on the ACK signal for each REQ pulse received. The initiator shall assert the ACK signal for a minimum of an assertion period. The initiator shall wait at least the greater of a transfer period from the last transition of ACK to true or for a minimum of a negation period from the last transition of ACK to false before asserting the ACK signal. If I/O is true (transfer to the initiator), the target shall first drive DB(7-0,P) to their desired values, wait at least one deskew delay plus one cable skew delay, then assert REQ. DB(7-0,P) shall be held valid for a minimum of one deskew delay plus one cable skew delay plus one hold time after the assertion of REQ. The target shall assert REQ for a minimum of an assertion period. The target may then negate REQ and change or release DB(7- 0,P). The initiator shall read the value on DB(7-0,P) within one hold time of the transition of REQ to true. The initiator shall then respond with an ACK pulse. If I/O is false (transfer to the target), the initiator shall transfer one byte for each REQ pulse received. After receiving a REQ pulse, the initiator shall first drive DB(7-0,P) to their desired values, delay at least one deskew delay plus one cable skew delay, then assert ACK. The initiator shall hold DB(7-0,P) valid for at least one deskew delay plus one cable skew delay plus one hold time after the assertion of ACK. The initiator shall assert ACK for a minimum of an assertion period. The initiator may then negate ACK and may change or release DB(7-0,P). The target shall read the value of DB(7-0,P) within one hold time of the transition of ACK to true. 5.1.6 COMMAND Phase. The COMMAND phase allows the target to request command information from the initiator. The target shall assert the C/D signal and negate the I/O and MSG signals during the REQ/ACK handshake(s) of this phase. 5.1.7 Data Phase. The data phase is a term that encompasses both the DATA IN phase and the DATA OUT phase. 5.1.7.1 DATA IN Phase. The DATA IN phase allows the target to request that data be sent to the initiator from the target. The target shall assert the I/O signal and negate the C/D and MSG signals during the REQ/ACK handshake(s) of this phase. 5.1.7.2 DATA OUT Phase. The DATA OUT phase allows the target to request that data be sent from the initiator to the target. The target shall negate the C/D, I/O, and MSG signals during the REQ/ACK handshake(s) of this phase. 5.1.8 STATUS Phase. The STATUS phase allows the target to request that status information be sent from the target to the initiator. The target shall assert C/D and I/O and negate the MSG signal during the REQ/ACK handshake of this phase. 5.1.9 Message Phase. The message phase is a term that references either a MESSAGE IN, or a MESSAGE OUT phase. Multiple messages may be sent during either phase. The first byte transferred in either of these phases shall be either a single-byte message or the first byte of a multiple-byte message. Multiple-byte messages shall be wholly contained within a single message phase. 5.1.9.1 MESSAGE IN Phase. The MESSAGE IN phase allows the target to request that message(s) be sent to the initiator from the target. The target shall assert C/D, I/O, and MSG during the REQ/ACK handshake(s) of this phase. 5.1.9.2 MESSAGE OUT Phase. The MESSAGE OUT phase allows the target to request that message(s) be sent from the initiator to the target. The target may invoke this phase at its convenience in response to the ATTENTION condition (see 5.2.1) created by the initiator. The target shall assert C/D and MSG and negate I/O during the REQ/ACK handshake(s) of this phase. The target shall handshake byte(s) in this phase until ATN goes false, unless an error occurs (see MESSAGE REJECT, 5.5.2). If the target detects one or more parity error(s) on the message byte(s) received, it may indicate its desire to retry the message(s) by asserting REQ after detecting ATN has gone false and prior to changing to any other phase. The initiator, upon detecting this condition, shall resend all of the previous message byte(s) sent during this phase. When resending more than one message byte, the initiator shall assert ATN prior to asserting ACK on the first byte and shall maintain ATN asserted until the last byte is sent as described in 5.2.1. If the target receives all of the message byte(s) successfully (i.e., no parity errors), it shall indicate that it does not wish to retry by changing to any information transfer phase other than the MESSAGE OUT phase and transfer at least one byte. The target may also indicate that it has successfully received the message byte(s) by changing to the BUS FREE phase (e.g., ABORT or BUS DEVICE RESET messages). 5.1.10 Signal Restrictions Between Phases. When the SCSI bus is between two information transfer phases, the following restrictions shall apply to the SCSI bus signals: (1) The BSY, SEL, REQ, and ACK signals shall not change. (2) The C/D, I/O, MSG, and DATA BUS signals may change. When switching the DATA BUS direction from out (initiator driving) to in (target driving), the target shall delay driving the DATA BUS by at least a data release delay plus a bus settle delay after asserting the I/O signal and the initiator shall release the DATA BUS no later than a data release delay after the transition of the I/O signal to true. When switching the DATA BUS direction from in (target driving) to out (initiator driving), the target shall release the DATA BUS no later than a deskew delay after negating the I/O signal. (3) The ATN and RST signals may change as defined under the descriptions for the ATTENTION condition (5.2.1) and RESET condition (5.2.2). 5.2 SCSI Bus Conditions. The SCSI bus has two asynchronous conditions; the ATTENTION condition and the RESET condition. These conditions cause the SCSI device to perform certain actions and can alter the phase sequence. 5.2.1 ATTENTION Condition. The ATTENTION condition allows an initiator to inform a target that the initiator has a message ready. The target may get this message at its convenience by performing a MESSAGE OUT phase. The initiator creates the ATTENTION condition by asserting ATN at any time except during the ARBITRATION or BUS FREE phases. The target may respond with the MESSAGE OUT phase. The initiator shall keep ATN asserted if more than one byte is to be transferred. The initiator may negate the ATN signal at any time except it shall not negate the ATN signal while the ACK signal is asserted during a MESSAGE OUT phase. Normally, the initiator negates ATN while REQ is true and ACK is false during the last REQ/ACK handshake of the MESSAGE OUT phase. 5.2.2 RESET Condition. The RESET condition is used to immediately clear all SCSI devices from the bus. This condition shall take precedence over all other phases and conditions. Any SCSI device may create the RESET condition by asserting RST for a minimum of a reset hold time. During the RESET condition, the state of all SCSI bus signals other than RST is not defined. All SCSI devices shall release all SCSI bus signals (except RST) within a bus clear delay of the transition of RST to true. The BUS FREE phase always follows the RESET condition. The effect of the RESET condition on uncompleted commands, SCSI device reservations, and SCSI device operating modes is determined by whether the SCSI device has implemented the "hard" RESET option or the "soft" RESET option (one of which shall be implemented) as defined in 5.2.2.1 and 5.2.2.2. 5.2.2.1 "Hard" RESET Option. SCSI devices that implement the "hard" RESET option, upon detection of the RESET condition, shall: (1) Clear all uncompleted commands (2) Release all SCSI device reservations (3) Return any SCSI device operating modes (MODE SELECT, PREVENT/ALLOW MEDIUM REMOVAL commands, etc) to their default conditions. 5.2.2.2 "Soft" RESET Option. SCSI devices that implement the "soft" RESET option, upon detection of the RESET condition, shall: (1) Attempt to complete any uncompleted commands that were fully identified (2) Preserve all SCSI device reservations (3) Preserve any SCSI device operating modes (MODE SELECT, PREVENT/ALLOW MEDIUM REMOVAL commands, etc) The "soft" RESET option allows a single initiator to reset the SCSI bus without disturbing the operation of other initiators in a multiple initiator system. To ensure proper operation the following conditions shall be met: (1) An initiator shall not consider a command to be fully identified until the IDENTIFY message is sent to the target and the target responds by changing to any other information transfer phase and requests that at least one byte be transferred. (2) A target shall consider a command to be fully identified when it successfully receives the IDENTIFY message. (3) If an initiator selects a logical unit for which there already is an active command for the same initiator, the target shall clear the original command and perform the new command. (4) If a target reselects an initiator to continue a command for which the initiator has no record, the initiator shall abort that command by sending the ABORT message. (5) An initiator shall consider a command to be completed when it negates ACK for a successfully received COMMAND COMPLETE message. (6) A target shall consider a command to be completed when it detects the false transition of ACK for the COMMAND COMPLETE message with the ATN signal false. (7) An initiator shall not negate ACK for the SAVE DATA POINTER message until it has actually saved the data pointer for the operation. (8) A target shall consider the data pointer to be saved when it detects the false transition of ACK for the SAVE DATA POINTER message with the ATN signal false. (9) If the RESET condition occurs between the time that the target asserts REQ for the SAVE DATA POINTER message and it detects the false transition of ACK, the target shall terminate the command with a CHECK CONDITION status. If extended sense is implemented, the target shall set the sense key to ABORTED COMMAND. This is necessary because the target cannot determine whether the data pointer has actually been saved. NOTE: If the ATN signal is true in conditions (6) or (8), the target would normally switch to MESSAGE OUT phase and attempt to transfer a message byte. If the RESET condition occurs before it is able to successfully receive the message byte, the target shall assume that the initiator may not have successfully received the COMMAND COMPLETE message or the SAVE DATA POINTER message. In the case of COMMAND COMPLETE message, the target shall reselect the initiator and attempt to send the COMMAND COMPLETE message again. In the case of the SAVE DATA POINTER message, the target shall reselect the initiator and terminate the command as described in condition (9). 5.3 SCSI Bus Phase Sequences. The order in which phases are used on the SCSI bus follows a prescribed sequence. In all systems, the RESET condition can abort any phase and is always followed by the BUS FREE phase. Also, any other phase can be followed by the BUS FREE phase. 5.3.1 Nonarbitrating Systems. In systems where the ARBITRATION phase is not implemented, the allowable sequences shall be as shown in Figure 5-1. The normal progression is from the BUS FREE phase to SELECTION, and from SELECTION to one or more of the information transfer phases (COMMAND, DATA, STATUS, or MESSAGE). 5.3.2 Arbitrating Systems. In systems where the ARBITRATION phase is implemented, the allowable sequences shall be as shown in Figure 5-2. The normal progression is from the BUS FREE phase to ARBITRATION, from ARBITRATION to SELECTION or RESELECTION, and from SELECTION or RESELECTION to one or more of the information transfer phases (COMMAND, DATA, STATUS, or MESSAGE). 5.3.3 All Systems. There are no restrictions on the sequences between information transfer phases. A phase type may even be followed by the same phase type (e.g., a data phase may be followed by another data phase). Figure 5-1. Phase Sequences without Arbitration Figure 5-2. Phase Sequences with Arbitration 5.4 SCSI Pointers. Consider the system shown in Figure 5-3 in which an initiator and target communicate on the SCSI bus in order to execute a command. ------------------------- ------------------------- | Function | | Initiator|-----------------| Target | | Function | | Origin | | Path | SCSI BUS | Path | | Execution| | | | Control |-----------------| Control | | | ------------------------- ------------------------- Initiator Target Figure 5-3. Simplified SCSI System The SCSI architecture provides for two sets of three pointers within each initiator. The pointers reside in the initiator path control. The first set of pointers are known as the current (or active) pointers. These pointers are used to represent the state of the interface and point to the next command, data, or status byte to be transferred between the initiator's memory and the target. There is only one set of current pointers in each initiator. The current pointers are used by the target currently connected to the initiator. The second set of pointers are known as the saved pointers. There is one set of saved pointers for each command that is currently active (whether or not it is currently connected). The saved command pointer always points to the start of the command descriptor block (see 6.2) for the current command. The saved status pointer always points to the start of the status area for the current command. At the beginning of each command, the saved data pointer points to the start of the data area. It remains at this value until the target sends a SAVE DATA POINTER message (see 5.5.2) to the initiator. In response to this message, the initiator stores the value of the current data pointer into the saved data pointer. The target may restore the current pointers to their saved values by sending a RESTORE POINTERS message (see 5.5.2) to the initiator. The initiator moves the saved value of each pointer into the corresponding current pointer. Whenever an SCSI device disconnects from the bus, only the saved pointer values are retained. The current pointer values are restored from the saved values upon the next reconnection. 5.5 Message System Specification. The message system allows communication between an initiator and target for the purpose of physical path management. 5.5.1 Message Protocol. All SCSI devices shall implement the COMMAND COMPLETE message. A functional SCSI device can be constructed without using any of the other messages if the logical unit number is specified in the command descriptor block. The remainder of this section deals with the additional requirements on SCSI devices that support messages other than COMMAND COMPLETE. SCSI devices indicate their ability to accommodate more than the COMMAND COMPLETE message by asserting or responding to the ATN signal. The initiator indicates this in the SELECTION phase by asserting ATN prior to the SCSI bus condition of SEL true, and BSY false. The target indicates its ability to accommodate more messages by responding to the ATTENTION condition with the MESSAGE OUT phase after going through the SELECTION phase. For SCSI devices that support messages other than COMMAND COMPLETE, the first message sent by the initiator after the SELECTION phase shall be the IDENTIFY message. This allows the establishment of the physical path for a particular logical unit specified by the initiator. After the RESELECTION phase, the target's first message shall be IDENTIFY. This allows the physical path to be reestablished for the target's specified logical unit number. Under some exceptional conditions, an initiator may send the ABORT message or the BUS DEVICE RESET message instead of the IDENTIFY message, as the first message. Only one logical unit number shall be identified for any one selection sequence; a second IDENTIFY message with a new logical unit number shall not be issued before the SCSI bus has been released (BUS FREE phase). Whenever a physical path is established in an initiator that can accommodate disconnection and reconnection, the initiator shall ensure that the active pointers of the physical path are equal to the saved pointers for that particular logical unit number. (An implied restore pointers operation occurs as a result of connect or reconnect.) SCSI devices that implement any message other than the COMMAND COMPLETE message shall also implement the MESSAGE REJECT message. Table 5-2 Message Codes ============================================================================== Code Type Description Direction ------------------------------------------------------------------------------ 00H M COMMAND COMPLETE In 01H O EXTENDED MESSAGE In Out 02H O SAVE DATA POINTER In 03H O RESTORE POINTERS In 04H O DISCONNECT In 05H O INITIATOR DETECTED ERROR Out 06H O ABORT Out 07H O MESSAGE REJECT In Out 08H O NO OPERATION Out 09H O MESSAGE PARITY ERROR Out 0AH O LINKED COMMAND COMPLETE In 0BH O LINKED COMMAND COMPLETE (WITH FLAG) In 0CH O BUS DEVICE RESET Out 0DH _ 7FH R Reserved Codes 80H _ FFH O IDENTIFY In Out ============================================================================== Key: In = Target to initiator, Out = Initiator to target. 5.5.2 Messages. The single byte messages (Table 5-2) are listed along with their code values and their definitions. COMMAND COMPLETE 00H (Mandatory). This message is sent from a target to an initiator to indicate that the execution of a command (or series of linked commands) has terminated and that valid status has been sent to the initiator. After successfully sending this message, the target shall go to the BUS FREE phase by releasing BSY. NOTE: The command may have been executed successfully or unsuccessfully as indicated in the status. EXTENDED MESSAGE 01H (Optional). This message is sent from either the initiator or the target as the first byte of a multiple-byte message. (See 5.5.3 for descriptions of extended messages.) SAVE DATA POINTER 02H (Optional). This message is sent from a target to direct the initiator to save a copy of the present active data pointer for the currently attached logical unit. (See 5.4 for a definition of pointers.) RESTORE POINTERS 03H (Optional). This message is sent from a target to direct the initiator to restore the most recently saved pointers (for the currently attached logical unit) to the active state. Pointers to the command, data, and status locations for the logical unit shall be restored to the active pointers. Command and status pointers shall be restored to the beginning of the present command and status areas. The data pointer shall be restored to the value at the beginning of the data area in the absence of a SAVE DATA POINTER message or to the value at the point at which the last SAVE DATA POINTER message occurred for that logical unit. DISCONNECT 04H (Optional). This message is sent from a target to inform an initiator that the present physical path is going to be broken (the target plans to disconnect by releasing BSY), but that a later reconnect will be required in order to complete the current operation. If the initiator detects the BUS FREE phase (other than as a result of a RESET condition) without first receiving a DISCONNECT or COMMAND COMPLETE message, the initiator shall consider this as a catastrophic error condition. If the target intentionally creates this condition, the target shall clear the current command. This message shall not cause the initiator to save the data pointer. Note: If DISCONNECT messages are used break a long data transfer into two or more shorter transfers, then a SAVE DATA POINTER should be issued before each DISCONNECT message. INITIATOR DETECTED ERROR 05H (Optional). This message is sent from an initiator to inform a target that an error (e.g., parity error) has occurred that does not preclude the target from retrying the operation. Although present pointer integrity is not assured, a RESTORE POINTERS message or a disconnect followed by a reconnect, shall cause the pointers to be restored to their defined prior state. ABORT 06H (Optional). This message is sent from the initiator to the target to clear the present operation. If a logical unit has been identified, all pending data and status for the issuing initiator from the effected logical unit shall be cleared, and the target shall go to the BUS FREE phase. Pending data and status for other initiators shall not be cleared. If a logical unit has not been identified, the target shall go to the BUS FREE phase. No status or ending message shall be sent for the operation. It is not an error to issue this message to an logical unit that is not currently performing an operation for the initiator. MESSAGE REJECT 07H (Optional). This message is sent from either the initiator or target to indicate that the last message it received was inappropriate or has not been implemented. In order to indicate its intentions of sending this message, the initiator shall assert the ATN signal prior to its release of ACK for the REQ/ACK handshake of the message that is to be rejected. When a target sends this message, it shall change to MESSAGE IN phase and send this message prior to requesting additional message bytes from the initiator. This provides an interlock so that the initiator can determine which message is rejected. This message shall be implemented if any other optional messages are implemented. NO OPERATION 08H (Optional). This message is sent from an initiator in response to a target's request for a message when the initiator does not currently have any other valid message to send. MESSAGE PARITY ERROR 09H (Optional). This message is sent from the initiator to the target to indicate that one or more bytes in the last message it received had a parity error. In order to indicate its intentions of sending this message, the initiator shall assert the ATN signal prior to its release of ACK for the REQ/ACK handshake of the message that has the parity error. This provides an interlock so that the target can determine which message has the parity error. LINKED COMMAND COMPLETE 0AH (Optional). This message is sent from a target to an initiator to indicate that the execution of a linked command has completed and that status has been sent. The initiator shall then set the pointers to the initial state for the next linked command. LINKED COMMAND COMPLETE (WITH FLAG) 0BH (Optional). This message is sent from a target to an initiator to indicate that the execution of a linked command (with the flag bit set to one) has completed and that status has been sent. The initiator shall then set the pointers to the initial state of the next linked command. Typically this message would be used to cause an interrupt in the initiator between two linked commands. BUS DEVICE RESET 0CH (Optional). This message is sent from an initiator to direct a target to clear all current commands on that SCSI device. This message forces the SCSI device to an initial state with no operations pending for any initiator. Upon recognizing this message, the target shall go to the BUS FREE phase. Reserved 0DH to 7FH. These message codes are reserved for future standardization. IDENTIFY 80H to FFH (Optional). These messages are sent by either the initiator or the target to establish the physical path connection between an initiator and target for a particular logical unit. Bit 7. This bit is always set to one to distinguish these messages from the other messages. Bit 6. This bit is only set to one by the initiator. When set to one, it indicates that the initiator has the ability to accommodate disconnection and reconnection. Bits 5-3. Reserved. Bits 2-0. These bits specify a logical unit number in a target. Only one logical unit number shall be identified for any one selection sequence; a second IDENTIFY message with a new logical unit number shall not be issued before the bus has been released (BUS FREE phase). When sent from a target to an initiator during reconnection, an implied RESTORE POINTERS message shall be performed by the initiator prior to completion of this message. 5.5.3 Extended Messages (Optional). A value of one in the first byte of a message indicates the beginning of a multiple-byte extended message. The minimum number of bytes sent for an extended message is three. The extended message format and the extended message codes are shown in Tables 5-3 and 5-4, respectively. Table 5-3 Extended Message Format ============================================================================== Byte | Value | Description | ============================================================================== 0 | 01H | Extended message | ----------|----------|-------------------------------------------------------| 1 | nH | Extended message length | ----------|----------|-------------------------------------------------------| 2 | yH | Extended message code | ----------|----------|-------------------------------------------------------| 3 _ nH+1 | xH | Extended message arguments | ============================================================================== The extended message length specifies the length in bytes of the extended message code plus the extended message arguments to follow. Therefore, the total length of the message is equal to the extended message length plus two. A value of zero for the extended message length indicates 256 bytes follow. The extended message codes are listed in Table 5-4. The extended message arguments are specified for the defined extended messages in Sections 5.5.4 through 5.5.6. Table 5-4 Extended Message Codes ============================================================================== Code (yH) Description ------------------------------------------------------------------------------ 00H MODIFY DATA POINTER (Optional) 01H SYNCHRONOUS DATA TRANSFER REQUEST (Optional) 02H EXTENDED IDENTIFY (Optional) 03H _ 7FH Reserved 80H _ FFH Vendor Unique ============================================================================== 5.5.4 MODIFY DATA POINTER Message (Optional) Table 5-5 MODIFY DATA POINTER ============================================================================== Byte | Value | Description | ============================================================================== 0 | 01H | Extended message | -----|---------|-------------------------------------------------------------| 1 | 05H | Extended message length | -----|---------|-------------------------------------------------------------| 2 | 00H | MODIFY DATA POINTER code | -----|---------|-------------------------------------------------------------| 3 | xH | Argument (MSB) | -----|---------|-------------------------------------------------------------| 4 | xH | Argument | -----|---------|-------------------------------------------------------------| 5 | xH | Argument | -----|---------|-------------------------------------------------------------| 6 | xH | Argument (LSB) | ============================================================================== The MODIFY DATA POINTER message (Table 5-5) is sent from the target to the initiator and requests that the signed argument be added (two's complement) to the value of the current data pointer. 5.5.5 SYNCHRONOUS DATA TRANSFER REQUEST Message (Optional) Table 5-6 SYNCHRONOUS DATA TRANSFER REQUEST ============================================================================== Byte | Value | Description | ============================================================================== 0 | 01H | Extended message | -----|---------|-------------------------------------------------------------| 1 | 03H | Extended message length | -----|---------|-------------------------------------------------------------| 2 | 01H | SYNCHRONOUS DATA TRANSFER REQUEST code | -----|---------|-------------------------------------------------------------| 3 | mH | Transfer period (mH times 4 nanoseconds) | -----|---------|-------------------------------------------------------------| 4 | xH | REQ/ACK offset | ============================================================================== A pair of SYNCHRONOUS DATA TRANSFER REQUEST messages (Table 5-6) are exchanged between an initiator and a target whenever an SCSI device that can support synchronous data transfer recognizes that it has not communicated with the other SCSI device since receiving the last "hard" RESET condition or a BUS DEVICE RESET message. The SCSI devices may also exchange messages to establish synchronous data transfer when requested to do so. The message exchange establishes the transfer period and the REQ/ACK offset. The transfer period is the minimum time between leading edges of successive REQ pulses and of successive ACK pulses. The REQ/ACK offset is the maximum number of REQ pulses that may be outstanding before its corresponding ACK pulse is received at the target. A REQ/ACK offset value of zero shall indicate asynchronous mode; a value of FFH shall indicate unlimited offset. If the initiator recognizes that negotiation is required, it asserts ATN and, if the target implements message transfers, sends a SYNCHRONOUS DATA TRANSFER REQUEST message indicating an REQ/ACK offset and minimum transfer period. The REQ/ACK offset is chosen to prevent initiator buffer overflows, while the minimum transfer period is chosen to meet the data handling requirements of the initiator. The target responds in any of the following ways: Target Response Implied Agreement ------------------------------------- -------------------------------------- (1) REQ/ACK offset less than or equal REQ/ACK offset equal to target value. to the requested value. Minimum transfer period equal to Minimum transfer period equal to or greater than requested period. the target value. (2) REQ/ACK offset equal to zero. Asynchronous transfer. (3) MESSAGE REJECT. Asynchronous transfer. If the target recognizes that negotiation is required, it sends a SYNCHRONOUS DATA TRANSFER REQUEST message to the initiator. The REQ/ACK offset is selected to prevent buffer and offset counter overflows, while the minimum transfer period is chosen to meet the data handling requirements of the target. The initiator responds in any of the following ways if the target chooses an REQ/ACK offset equal to FFH: Initiator Response Implied Agreement ------------------------------------- -------------------------------------- (1) REQ/ACK offset equal to FFH. REQ/ACK offset unlimited. Minimum transfer period equal to Minimum transfer period equal to or greater than requested period. the initiator value. (2) REQ/ACK offset equal to 00H. Asynchronous transfer. The target may renegotiate for an REQ/ACK offset less than FFH and greater than 00H. (3) MESSAGE REJECT. Asynchronous transfer. The initiator responds in any of the following ways if the target selects an REQ/ACK offset less than FFH: Initiator Response Implied Agreement ------------------------------------- -------------------------------------- (1) REQ/ACK offset less than or equal REQ/ACK offset equals initiator value. to the requested value. Minimum transfer period equal to Minimum transfer period equal to the or greater than requested value. initiator value. (2) REQ/ACK offset equal to zero. Asynchronous transfer. (3) MESSAGE REJECT. Asynchronous transfer. The implied agreement shall remain in effect until a BUS DEVICE RESET message is received, until a "hard" RESET condition occurs, or until one of the two SCSI devices elects to modify the agreement. Renegotiation at every selection is not recommended, since a significant performance impact is likely. The default mode of data transfer is asynchronous mode. The default mode is entered at power on, after a BUS DEVICE RESET message, or after a "hard" RESET condition. The SYNCHRONOUS DATA TRANSFER REQUEST message exchange can only take place following a SELECTION phase that includes the SCSI IDs for both the initiator and the target. Violation of this rule may make data transfer impossible owing to disagreements among SCSI devices about the data transfer mode. 5.5.6 EXTENDED IDENTIFY Message (Optional) Table 5-7 EXTENDED IDENTIFY ============================================================================== Byte | Value | Description | ============================================================================== 0 | 01H | Extended message | -----|---------|-------------------------------------------------------------| 1 | 02H | Extended message length | -----|---------|-------------------------------------------------------------| 2 | 02H | EXTENDED IDENTIFY code | -----|---------|-------------------------------------------------------------| 3 | xxH | Sub-logical unit number | ============================================================================== The EXTENDED IDENTIFY message (Table 5-7) is optional and may be sent by a target or an initiator. It may be used in conjunction with the normal IDENTIFY message in order to expand the logical unit number addressing in a target. The sub-logical unit number specifies the encoded eight-bit sub- logical unit number used to identify one of 256 sub-logical units within the logical unit. This allows up to 2048 units to be addressed on a single target. 6. SCSI Commands This section defines the SCSI command structure and gives several examples. The command definitions assume a data structure providing the appearance at the interface of a contiguous set of logical blocks of a fixed or explicitly defined data length. The SCSI device maps the physical characteristics of the attached peripheral devices to one of several logical structures defined by the device type code. A single command may transfer one or more logical blocks of data. Multiple commands may be linked if they are sent to the same logical unit. A target may disconnect from the SCSI bus to allow activity by other SCSI devices while a logical unit is being prepared to transfer data. Upon command completion (successful or unsuccessful), the target returns a status byte to the initiator. Since most error and exception conditions cannot be adequately described with a single status byte, one status code, CHECK CONDITION, indicates that additional information is available. The initiator may issue a REQUEST SENSE command to retrieve this additional information. By keeping to a minimum the functions essential to communicate via this protocol, a wide range of peripheral devices of varying capability can operate in the same environment. Because subsets of the full architecture may be implemented, optional functions are noted. 6.1 Command Implementation Requirements. The first byte of any SCSI command shall contain an operation code as defined in this document. Three bits (bits 7 - 5) of the second byte of each SCSI command specify the logical unit if it is not specified using the IDENTIFY message (see 5.5.2). The last byte of all SCSI commands shall contain a control byte as defined in 6.2.6. 6.1.1 Reserved. Reserved bits, fields, bytes, and code values are set aside for future standardization. Their use and interpretation will be specified by future extensions to this standard. A reserved bit, field, or byte shall be set to zero, or in accordance with a future extension to this standard. A target that receives a reserved bit, field, or byte that is not zero or receives a reserved code value shall terminate the command with a CHECK CONDITION status and, if extended sense is implemented, the sense key shall be set to ILLEGAL REQUEST. It shall also be acceptable for a target to interpret the bit, field, byte, or code value in accordance with a future extension to this standard. 6.1.2 Operation Code Types Operation Code Type Description --------- ------------------------------------------------------------------- M Mandatory - Commands so designated shall be implemented in order to meet the minimum requirement of this standard. E Extended - Commands so designated shall be implemented in addition to mandatory commands to meet the extended requirement of this standard. O Optional - Commands so designated, if implemented, shall be implemented as defined in this standard. V Vendor unique - Operation codes so designated are available for vendor defined commands. See the vendor specifications where compatibility is desired. R Reserved - Operation codes so designated shall not be used. They are reserved for future extensions to this standard. 6.1.3 Unit Attention Condition. A unit attention condition for a logical unit shall begin for each initiator whenever the removable medium may have been changed or the target has been reset (by a BUS DEVICE RESET message or a "hard" RESET condition). The unit attention condition shall persist for each initiator until that initiator issues a command to the logical unit other than REQUEST SENSE or INQUIRY for which the target shall return CHECK CONDITION status. If the next command from that initiator to the logical unit (following the CHECK CONDITION status) is REQUEST SENSE, and if the target supports extended sense, then the UNIT ATTENTION sense key shall be returned. (If any command other than REQUEST SENSE is received, the unit attention condition is lost.) If an INQUIRY command is received from an initiator with a pending unit attention condition (before the target reports CHECK CONDITION status), the target shall perform the INQUIRY command and shall not clear the unit attention condition. If a REQUEST SENSE command is received from an initiator with a pending unit attention condition (before the target reports CHECK CONDITION status), then the target may either: (1) report any pending sense data and preserve the unit attention condition (2) discard any pending sense data, report UNIT ATTENTION sense key, and clear the unit attention condition for that initiator. If an initiator issues a command other than INQUIRY or REQUEST SENSE while a unit attention condition exists for that initiator, the target shall not perform the command and shall report CHECK CONDITION status. 6.2 Command Descriptor Block. A request to a peripheral device is performed by sending a command descriptor block to the target. For several commands, the request is accompanied by a list of parameters sent during the DATA OUT phase. See the specific commands for detailed information. The command descriptor block always has an operation code as the first byte of the command. This is followed by a logical unit number, command parameters (if any), and a control byte. For all commands, if there is an invalid parameter in the command descriptor block, then the target shall terminate the command without altering the medium. 6.2.1 Operation Code. The operation code (Table 6-1) of the command descriptor block has a group code field and a command code field. The three- bit group code field provides for eight groups of command codes. The five-bit command code field provides for thirty-two command codes in each group. Thus, a total of 256 possible operation codes exist. Operation codes are defined in Sections 7 through 13. The group code specifies one of the following groups: Group 0 - six-byte commands (see Table 6-2) Group 1 - ten-byte commands (see Table 6-3) Group 2 - reserved Group 3 - reserved Group 4 - reserved Group 5 - twelve-byte commands (see Table 6-4) Group 6 - vendor unique Group 7 - vendor unique (This page is intentionally blank.) Table 6-1 Operation Code ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Group Code | Command Code | ============================================================================== Table 6-2 Typical Command Descriptor Block for Six-byte Commands ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Operation Code | -----|-----------------------------------------------------------------------| 1 | Logical Unit Number |Logical Block Address (if required) (MSB) | -----|-----------------------------------------------------------------------| 2 | Logical Block Address (if required) | -----|-----------------------------------------------------------------------| 3 | Logical Block Address (if required) (LSB) | -----|-----------------------------------------------------------------------| 4 | Transfer Length (if required) | -----|-----------------------------------------------------------------------| 5 | Control Byte | ============================================================================== Table 6-3 Typical Command Descriptor Block for Ten-byte Commands ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Operation Code | -----|-----------------------------------------------------------------------| 1 | Logical Unit Number | Reserved | RelAdr | -----|-----------------------------------------------------------------------| 2 | Logical Block Address (if required) (MSB) | -----|-----------------------------------------------------------------------| 3 | Logical Block Address (if required) | -----|-----------------------------------------------------------------------| 4 | Logical Block Address (if required) | -----|-----------------------------------------------------------------------| 5 | Logical Block Address (if required) (LSB) | -----|-----------------------------------------------------------------------| 6 | Reserved | -----|-----------------------------------------------------------------------| 7 | Transfer Length (if required) (MSB) | -----|-----------------------------------------------------------------------| 8 | Transfer Length (if required) (LSB) | -----|-----------------------------------------------------------------------| 9 | Control Byte | ============================================================================== Table 6-4 Typical Command Descriptor Block for Twelve-byte Commands ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== 0 | Operation Code | -----|-----------------------------------------------------------------------| 1 | Logical Unit Number | Reserved | RelAdr | -----|-----------------------------------------------------------------------| 2 | Logical Block Address (if required) (MSB) | -----|-----------------------------------------------------------------------| 3 | Logical Block Address (if required) | -----|-----------------------------------------------------------------------| 4 | Logical Block Address (if required) | -----|-----------------------------------------------------------------------| 5 | Logical Block Address (if required) (LSB) | -----|-----------------------------------------------------------------------| 6 | Reserved | -----|-----------------------------------------------------------------------| 7 | Reserved | -----|-----------------------------------------------------------------------| 8 | Reserved | -----|-----------------------------------------------------------------------| 9 | Transfer Length (if required) (MSB) | -----|-----------------------------------------------------------------------| 10 | Transfer Length (if required) (LSB) | -----|-----------------------------------------------------------------------| 11 | Control Byte | ============================================================================== 6.2.2 Logical Unit Number. The logical unit number addresses one of up to eight physical or virtual devices attached to a target. This method of addressing is provided for systems that do not implement the IDENTIFY message. A target that accepts an IDENTIFY message shall use the logical unit number specified within the message. In this case, the target shall ignore the logical unit number specified within the command descriptor block. (Implementors note: It is a good practice for initiators that implement the IDENTIFY message to specify the same logical unit number in the command descriptor block.) 6.2.3 Logical Block Address. The logical block address on logical units shall begin with block zero and be contiguous up to the last logical block on that logical unit. Group 0 command descriptor blocks contain 21-bit logical block addresses. Groups 1 and 5 command descriptor blocks contain 32-bit logical block addresses. The logical block concept implies that the initiator and target shall have previously established the number of data bytes per logical block. This may be established through the use of the READ CAPACITY command or the MODE SENSE command or by prior arrangement. 6.2.4 Relative Address Bit. The relative address (RelAdr) bit of the group 1 and group 5 commands is set to one to indicate that the logical block address portion of the command descriptor block is a two's complement displacement. This negative or positive displacement is to be added to the logical block address last accessed on the logical unit to form the logical block address for this command. This feature is only available when linking commands. The feature requires that a previous command in the linked group have accessed a block of data on the logical unit. (For an example of the operation of this function, see Section 6.3.3.) 6.2.5 Transfer Length. The transfer length specifies the amount of data to be transferred, usually the number of blocks. For several commands the transfer length indicates the requested number of bytes to be sent as defined in the command description. For these commands the transfer length field may be identified by a different name. See the following descriptions and the individual command descriptions for further information. Commands that use one byte for transfer length allow up to 256 blocks of data to be transferred by one command. A transfer length value of 1 to 255 indicates the number of blocks that shall transferred. A value of zero indicates 256 blocks. Commands that use two bytes for transfer length allow up to 65,535 blocks of data to be transferred by one command. In this case, a transfer length of zero indicates that no data transfer shall take place. A value of 1 to 65,535 indicates the number of blocks that shall be transferred. For several commands more than two bytes are allocated for transfer length. Refer to the specific command description for further information. The transfer length of the commands that are used to send a list of parameters to a target is called the parameter list length. The parameter list length specifies the number of bytes sent during the DATA OUT phase. The transfer length of the commands that are used to return sense data (e.g. REQUEST SENSE, INQUIRY, MODE SENSE, etc) to an initiator is called the allocation length. The allocation length specifies the number of bytes that the initiator has allocated for returned data. The target shall terminate the DATA IN phase when allocation length bytes have been transferred or when all available sense data have been transferred to the initiator, whichever is less. 6.2.6 Control Byte. The control byte is the last byte of every command descriptor block. A typical control byte is described in Table 6-5. Table 6-5 Control Byte ============================================================================== Bit| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Byte | | | | | | | | | ============================================================================== Last | Vendor unique | Reserved | Flag | Link | ============================================================================== Bit Description ----- ---------------------------------------------------------------------- 7 _ 6 Vendor unique 5 _ 2 Reserved 1 Flag bit - If the link bit is zero, then the flag bit shall be set to zero. If the link bit is one, and if the command terminates successfully, the target shall send LINKED COMMAND COMPLETE message if the flag bit is zero and shall send LINKED COMMAND COMPLETE (WITH FLAG) message if the flag bit is one. Typically, this bit is used to cause an interrupt in the initiator between linked commands. 0 Link bit - This bit is set to one to indicate that the initiator desires an automatic link to the next command upon successful completion of the current command. Implementation of linked commands is optional. If the link bit is one, targets that implement linked commands, upon successful termination of the command, shall return INTERMEDIATE status and shall then send one of the two messages defined by the flag bit (above). Targets that do not implement linked commands shall return a CHECK CONDITION status and, if extended sense is implemented, shall set the sense key to ILLEGAL REQUEST if either of the link and flag bits are set to one. 6.3 Command Examples 6.3.1 Single Command Example. A typical operation on the SCSI bus is likely to include a single READ command to a peripheral device. This operation is described in detail starting with a request from the initiator. This example assumes that no linked commands and no malfunctions or errors occur. The initiator has active pointers and a set of stored pointers representing active disconnected SCSI devices (an initiator without disconnect capability does not require stored pointers). The initiator sets up the active pointers for the operation requested, arbitrates for the SCSI bus, and selects the target. Once this process is completed, the target assumes control of the operation. The target obtains the command from the initiator (in this case, a READ command). The target interprets the command and executes it. In this case, the target gets the data from the peripheral device and sends it to the initiator. At the completion of the READ command, the target sends a status byte to the initiator. To end the operation, the target sends a COMMAND COMPLETE message to the initiator. 6.3.2 Disconnect Example. In the above single command example, the length of time necessary to obtain the data may require a time-consuming physical seek. In order to improve system throu